This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28027: Problem with SPI

Part Number: TMS320F28027
Other Parts Discussed in Thread: LAUNCHXL-F28027

Hi,

I'm working with LAUNCHXL-F28027 and I'm trying to use the SPIA peripheral with a Raspberry Pi. The issue is that it never enters the callbacks for the transmiter and receiver interrupts. Actually, it enters the first time just for the receiver interrupt, but then the RXFFIENA register comes high and it never goes low, so I think it is one of the keys for this issue. Please, if someone knows what could be the problem I would really appreciate.

This is the code. The main is just a call to those functions and a for(;;).

void SPIa_Init(void (*tx_int)(void), void (*rx_int)(unsigned char))
  {


   EALLOW ;

   SpiaRegs.SPICCR.bit.SPISWRESET = 0;  // Reset condition

   SpiaRegs.SPICCR.bit.CLKPOLARITY = 1; // Falling edge
   SpiaRegs.SPICCR.bit.SPICHAR = 7;  // Character length 8 bits

   SpiaRegs.SPICTL.bit.MASTER_SLAVE = 0;    // Configured as slave
//   SpiaRegs.SPICTL.bit.SPIINTENA = 1;   // Enables T/R interrupt

   SpiaRegs.SPICTL.bit.TALK = 1;    // Disable Transmit Path

   SpiaRegs.SPIFFTX.bit.SPIFFENA = 1;   /* SPI_A FIFO mode*/
//   SpiaRegs.SPIFFTX.bit.TXFFIL = 0;

   SpiaRegs.SPIFFRX.bit.RXFFIL = 4;      // Set RX FIFO level to 0
   SpiaRegs.SPIFFRX.bit.RXFFIENA = 1;
//   SpiaRegs.SPIFFRX.bit.RXFFINTCLR = 1;
//   SpiaRegs.SPIPRI.all=0x0010;

   spia_rx_callback = rx_int ;
   spia_tx_callback = tx_int;

   SpiaRegs.SPICCR.bit.SPISWRESET = 1;
//   SpiaRegs.SPIFFTX.bit.TXFIFO=1;
//   SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
   EDIS;

   DINT;

//    Enable the SCI receive interrupt
   Hwi_create(72, SPIARX_ISR, NULL, NULL); // Enable SPIRXINTA in PIE group 6
   Hwi_create(73, SPIATX_ISR, NULL, NULL); // Enable SPIRXINTA in PIE group 6

   EINT;                                    // Enable Interrupts at the CPU level

   return ;
}

void SPIARX_ISR (UArg arg)
{
   rdata[1] = SpiaRegs.SPIRXBUF; // Slave reads data
   rdata[2] = SpiaRegs.SPIRXBUF; // Slave reads data
   rdata[3] = SpiaRegs.SPIRXBUF; // Slave reads data
//   rdata[4] = SpiaRegs.SPIRXBUF; // Slave reads data
//   rdata[5] = SpiaRegs.SPIRXBUF; // Slave reads data

//   if(spia_rx_callback != 0)
//     (*spia_rx_callback)(rdata[1]);               //sends the data to a function pointed by sci_callback
   EALLOW;
   //SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1;  // Clear Overflow flag
   SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1;  // Clear Interrupt flag
//   PieCtrlRegs.PIEACK.all|=0x20;       // Issue PIE ack
   EDIS;
}

void SPIATX_ISR (UArg arg)
{
    SpiaRegs.SPITXBUF = sdata[1]; // Slave transmits data

    SpiaRegs.SPIFFTX.bit.TXFFINTCLR=1;  // Clear Interrupt flag
    PieCtrlRegs.PIEACK.all|=0x20;       // Issue PIE ACK
   //if(spia_tx_callback != 0)
   //  (*spia_tx_callback)();                    // execute a function pointed by sci_callback
}
void initGPIO(void){
    EALLOW;

    //RASPBERRY(SPIA)
//    GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;
//    GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;
//    GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;
//    GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;  /* Enable pull-up on GPIO18 (SPICLKA)*/
    GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1;    //SPISIMOA
    GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1;    //SPISOMIA
    GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1;    //SPISTE
    GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1;    //SPICLK
//    GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3;
//    GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3;
//    GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3;
//    GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3;

    //LED
    GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0;    //Used as GPIO
    GpioCtrlRegs.GPADIR.bit.GPIO0 = 1;     //Output

    //Right Motor
    GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1;     //EPWM2A
    GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;     //EPWM2B
    GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 2;    //EQEP2A
    GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 2;    //EQEP2B

    //US Sensors - falta el trigger y el Output para los otros dos
    GpioCtrlRegs.GPADIR.bit.GPIO4 = 1;      // Output Left
    GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 0;     // Trigger Left
    GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 3;     //ECAP1 - Left
    GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 3;     //ECAP2 - Front
    GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 1;    //ECAP3 - Right

    //Analog inputs
    GpioCtrlRegs.AIOMUX1.bit.AIO2 = 0;  // ADCINA2 - Left
    GpioCtrlRegs.AIOMUX1.bit.AIO4 = 0;  // ADCINA4 - Front
    GpioCtrlRegs.AIOMUX1.bit.AIO6 = 0;  // ADCINA6 - Right

    EDIS;

}

void initSystem(void){
    EALLOW;

    //Necessary at least for debugging
    SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;
    (*Device_cal)();
    SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 0;

    //Low Speed Clock configuration
    SysCtrlRegs.LOSPCP.all = 0b010;     //Divided by 4

    //Enable peripheral clocks
    SysCtrlRegs.PCLKCR0.bit.SPIAENCLK = 1;
    SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;
    SysCtrlRegs.PCLKCR0.bit.I2CAENCLK = 1;
    SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;
    SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1;
    SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1;
    SysCtrlRegs.PCLKCR1.bit.EPWM4ENCLK = 1;
    SysCtrlRegs.PCLKCR1.bit.ECAP1ENCLK = 1;

    EDIS;
}

  • Hi,

    I am writing to let you know that a C2000 team member has been assigned to answer to this post.

    Thanks
    Vasudha
  • Ines,

    In your SPIARX_ISR, you have the PIEACK commented out? If you do not ACK the interrupt, it will never be entered again. In the interrupt you read and clear the flag within the SPI module, but the next time it is triggered, you will not be able to access it.

    Please uncomment this line.

    Thanks,
    Mark
  • Hi,

    It was probably a problem, but it didn't work either. I uncommented the GPAPUD and GPAQSEL2 lines too, and now I reset the receive FIFO after reading the info. Then it worked. I don't know why, but the SPIA didn't reduce the state number in the receiver FIFO, so I had to do it "manually". It worked for me. I have passed this code to the F28069 and this reset wasn't necessary, so I don't know. But it finally worked, thank you.

    Inés