CCS/TMS320F28377S: How to reduce current harmonic distortion in Grid tie inverter

To evaluate if 5% is bad or not, it depends on the % of rated load. 

Typically you can improve THD by improving bandwidth or gains at the grid frequency and its harmonics. 

chappidi, 

6 degree of phase lag is 1.6% error, that is more than my expectation.

regardless, if you want to phase shift.. please do the following 

offset=0.104719; // (6/360)*2*pi

Manipulate_theta= spll_obj->theta[0] + offset;

if(Manipulate_theta>(float32)(2*3.1415926))
Manipulate_theta=Manipulate_theta - (float32)(2*3.1415926);

Regards

Manish Bhardwaj  

good day!

thank you, we will implement suggested code and will provide our results for your analysis.

regards

chappidi

Dear Manish,

in continuous to above information and we wish to share our other observations that  We have got basic doubt on how qualitatively capturing (reproduction ) of grid export current information.

Please find Grid tie inverter output voltage in blue colour and load current in yellow colour when applied around 600W  resistivity load. We have tried to capture the corresponding Vd and Id to understand that how best we are able to reproduce the digital information.  We expected ideal straight line as load is resistivity.but the wave form is contains some noise information. can you please provide your analysis that acceptable or still any thing (adding filter etc) to get straight line.

blue is Vd and Pu value is 1 = 800V and Orange is Id and Pu value is 1 = 10A .Hope , above information may provide you little more for your analysis.

Regards,

Bhima

Dear Manish,

Thank you for your valuable suggestions.

Please find attached results of GTI,which are taken at different ISR frequencies like 25usec,50usec and 100usec. Switching frequency is 20kHz.We have noticed improvement for different ISR values. We fare feeling that we may be failing to implement code properly as we are not seeing influence of different ISR and found same results for all above ISR frequencies.

We look forward to receive your further instructions..

Regards,readings at different isr freq.rar

Bhima Prasad

Dear Manish,

Sorry for delay in response,  we have changed coefficients for control . however once again we have optimized and again captured wave form and found little improvement  for 25us ISR operation. i.e iTHD consistence in all phases  (6.1,6.2,6.1% ) at 5kw 100% load and pf is unity in all phases .  The  corresponding code  and images  attached for your reference.  

ADC is sync with PWM. We are able to operate ISR at max ADC  is 40kHz (25us). We struggle to increase ISR more than 40kHz as ADC is sync with PWM. Is there any other way to increase ISR frequency more than 40kHz as we wanted verify ithd results for higher frequencies as advised by you.

Please   provide your analysis to reach target ithd <3%.

Thanks and Regards,

Bhima Prasad.

Dear Manish,

Happy to  get immediate response and note your suggestions,

1) Currently we unable to run SFRA. we definitely use this tool,which is faster and accurate for regulators tuning.

2) We had problem with 5th harmonic.

3) we would like  to modify (added additional blocks as shown in shadow) our control flow as per attached document  to address 5th harmonic issue.

4) we will configure ADCs also as per your suggestions i.e one trigger at PDR other at ZROPI for 5th Harmonic.pdf

one attachment is missed in earlier reply

regards,

Bhimaadd5thharmonic pll.pdf

Dear Manish,

We found improvement with your inputs. We have added DF22 controller to eliminate significance of  3rd,5th harmonics.  We  manually (trial and error) tuned KII,WRC1 coefficients till get the optimized Ithd and document is attached for your reference.Now we are getting Ithd around 4.7 to 5.5% (<6%) .Our object is to bring down ithd <3%. what more needs to be done.

I am expecting we can fine tune further with help of SFRA tool. But we are facing error while using SFRA. First,we wish to sort out the SFRA issue to make use of the tool properly. Please suggest.

Please clarify our doubt that  SFRA can be used  for fine tuning of PI controller of all sections of GTI. because we are  basically using two PI controllers for GTI i.e one for Voltage regulator to produce Id_ref and second one for Current PI controller. Now we are adding DF22 controller for 3rd,5th ,7th +++ for elimination of harmonics.  I think we need to tune one after other or is there any procedure.

Regards,

Bhima Prasad

Dear Bhardwaj,

GTI results with SFRA tool:

Load = Grid =5kW (full load),  GTI_Switching Frequency:20kHz, Grid frequency:50Hz

FRA settings = Default =Freq Vector length =100, start freq =100Hz,Steps per decade =40,injection amplitude =.01

Generated CSV file.

Tuned Kp is 0.08 and Ti = 0.09,Ki=8 till we get bandwidth=0.11kHz,Gain margin =5.07dB,Phase margin=57.78Degrees (may we know what are recommended values of BW,GM and PM for main GTI plant)

we have embedded these values in code and observed that ithd is around 11% at 5kW grid load.

I am thinking that some thing we are missing to use this SFRA tool properly. May i get some clues to  make use of this tool properly.

Regards,

Bhima Prasad.

Thank you Bhardwaj,current_control_3ph_GTI.pdf

we will try above and provide you the results.

however we wish to share our current regulator schematic as attached and other issues for your guidelines and clarifications. We are facing two issues that one is we are unable to run SFRA tool in float format, Second one is we are unable to find 3rd/5th Harmonic (DCL_DF22) controller code in  IQ format.can we get DCL_DF22 code in IQ format.

Regards,

Bhima Prasad

Dear Bhardwaj,

Please note significance of different harmonic influence.

can you Please provide us DCL_DF22 code in IQ format. 1. Move to double sample = please elaborate

Regards,

Bhima

results are missed in earlier reply

sorry results again not attached .please find attachmentharmonic_thd_inverter.pdf

chappidi,

1. DCL Code in IQ format:  DCL lib is not ported to IQ format and there is no plan to port it to IQ format.

you can use the CNTL_2P2Z module which is in controlSUITE under solar library, note there is a sign change in the CNTL_2P2Z module

Here is the inverter example that uses it:

C:\ti\controlSUITE\development_kits\HV_1PH_DCAC\v1_04_00_00\f2837x

2. I am not sure if your harmonic compensation is correct. Unfortunately I myself have not done this for three phase inverters where this is in DQ domain.

There are a couple of options to do this

Following is one suggestion to achieve this.

The way you have it , will not work because of the DQ transform, that method that i showed you for the single phase works if the control is in abc domain. It will work very differently in the DQ domain

Dear Bhardwaj,

Thank you for your valuable inputs, sorry we took more time to respond due to understanding, implementation and other priorities. we have implemented harmonic control in dq domain as suggested in above schematic. we understood implemented new block (shown in shade) is responding means we are able to see some outputs. Please find an attached control ,which is added to our existing control by considering above schematic. Also find results in graphs at appropriate points as provided in pdf.

but we don't find improvement in performance i.e reduction in harmonic. can you please verify our control schematic and provide your suggestions .

Regards,

BhimaGTI_control.pdfharmonic_graphs.pdf