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TMS320F28379D: problem with transmitting the adc result via the sci

Part Number: TMS320F28379D
Other Parts Discussed in Thread: CONTROLSUITE

Hi,

Related to my previous question about transmitting the result of the adc to a hyperterminal via SCI which I managed to transmit the result correctly. Now I want to save the AdcResult to text file to be used later for further processing.  what I added so far to my amended "adc_soc_epwm_cpu01.c" example are: 

1- I defined a file Globally as (FILE *myFile).

2- In the Adca1_isr below I created a condition to open and close the file.

3- I tried to save a simple counter to the file using the fprintf function which resulted in that the alocated RAM for .text is not enough. SO I tried to change the .text ram alocation as following: 

//.text : >>RAMM0 | RAMD0| RAMLS0, PAGE = 0                                              // I chaged it to this previously so that sprintf to work and it worked correctly.
 .text : >>RAMGS12 | RAMGS13| RAMGS14| RAMGS15, PAGE = 1                // I chaged the above line to this line so that the fprintf works.

but when I did this change, the error which showed below is no more exist. HOWEVER, when I debug and run the project, the adcaResults buffer didn't receive and conversion results. 

"C:/ti/controlSUITE/device_support/F2837xD/v210/F2837xD_common/cmd/2837xD_RAM_lnk_cpu1.cmd", line 54: error #10099-D: program will not fit into available memory. placement with
alignment/blocking fails for section ".text" size 0x2b3f page 0. Available memory ranges:
RAMM0 size: 0x2de unused: 0x1 max hole: 0x1
RAMD0 size: 0x800 unused: 0x0 max hole: 0x0
RAMLS0 size: 0x2000 unused: 0x1 max hole: 0x1 
error #10010: errors encountered during linking; "adc_soc_epwm_cpu01.out" not built. 

See my RAM file at the end of the post.

----------------------------------------------------------------------------------------------------------------------------------------------------


//
// adca1_isr - Read ADC Buffer in ISR
//
interrupt void adca1_isr(void)
{

AdcaResults[resultsIndex++] =AdcaResultRegs.ADCRESULT0;
 
if(RESULTS_BUFFER_SIZE == resultsIndex)
{
for (z=0;z<RESULTS_BUFFER_SIZE;z++)
{
Vin = AdcaResults[z];
send_result(Vin);
}
}
int counter = 0;
if (counter < 9){
myFile = fopen("AdcaResults.txt","w");
fprintf(myFile,"%d\n",counter);
//printf(filePtr,"%d,",AdcaResults);
counter++;
}
else if(counter == 9){
fclose(myFile);
}


if(RESULTS_BUFFER_SIZE <= resultsIndex)
{
resultsIndex = 0;
bufferFull = 1;
}

AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

-------------------------------------------------------------------------------------------------------------------------------------------------------


MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */

BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE // length was = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x002000 // this was 0x000800
// RAMLS1 : origin = 0x008800, length = 0x000800 // was 0x000800
// RAMLS2 : origin = 0x009000, length = 0x000800 // was 0x000800
// RAMLS3 : origin = 0x009800, length = 0x000800 // was 0x000800
// RAMLS4 : origin = 0x00A000, length = 0x000800 // was 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002

PAGE 1 :

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS5 : origin = 0x00A800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */

CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400

CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
}


SECTIONS
{
codestart : > BEGIN, PAGE = 0
// .text : >>RAMM0 | RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
//.text : >>RAMM0 | RAMD0| RAMLS0, PAGE = 0                                    // I chaged the above line to this line
.text : >>RAMGS12 | RAMGS13| RAMGS14| RAMGS15, PAGE = 1     // I chaged the above line to this line so that fprintf works

.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

.cio : > RAMGS15, PAGE = 1 // I added this Line, was not here
.stack : > RAMM1, PAGE = 1
.ebss : > RAMGS13, PAGE = 1 // was RAMLS5 I changed to open text file
.econst : > RAMGS14, PAGE = 1 // was RAMLS5
.esysmem : > RAMLS5, PAGE = 1
Filter_RegsFile : > RAMGS0, PAGE = 1

ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} > RAMM0, PAGE = 0
#else
ramfuncs : > RAMM0 PAGE = 0 
#endif
#endif

/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}

GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}

/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

kind Regards

Hayder 

  • Hi Hayder,

    .text is for program instructions.  These should go in page 0.

    Page 1 is for data/variables. 

    You can map the GSRAM or other rams to either page, but you need to make sure that everything is consistent (text goes into page 0 RAMS and those rams are defined as page 0).  

  • Hi Devin,

    Thanks for your reply and explanation. I moved the RAMSG12 from page 1 to page 0, and I added it to the .text alocation as following:

      .text            : >>RAMM0 | RAMD0|  RAMLS0| RAMGS12,   PAGE = 0

    this removed the error when building the project.

    I did some changes to the condition in the adca1_isr I mentioned earlier to save the adcaResult to a text file as in the attached picture:

    When I debug and run the project, the created text file start to store the the adcaResults, HOWEVER, Not all the adcaResults buffer array  is stored in the text file.  the text file only received 45 integer as following:

    3078,  3093,  3100,  18,  1,  25,  3098,  3088,  3092,  0,  6,  12,  3084,  3070,  3091,  14,  0,  0,  3086,  3074,  3086,  2,  3,  19,  3092,  3099,  3103,  23,  16,  22,  3085,  3044,  3094,  0,  3,  7,  3088,  3098,  3085,  8,  19,  20,  3107,  3081,  3

    I appreciate your reply

    Regards

    Hayder

  • Hi Hayder,

    What do the results look like in memory? I'd probably recommend you just store the ADC results in an array in RAM and make sure that looks correct. Then you can add code to scan them out either after the results are complete or at the same time. Either way you'll have the values in RAM to compare to while debugging so you know if the issue is the program flow or the scan-out process.
  • Hi devin,

    The below picture shows the Adc results in the memory:


    The results in the memory look fine to me and the plotting shows that as well. while below is  the array which have been stored to the text file: 

    226,  3329,  3324,  3329,  243,  246,  250,  3321,  3312,  3303,  236,  238,  222,  3319,  3317,  3320,  237,  256,  259,  3316,  3316,  3350,  243,  255,  237,  3312,  3312,  3277,  245,  245,  232,  3319,  3316,  3277,  242,  237,  197,  3307,  3312,  32

    Any advice to sort this out. 

    kind regards 

    Hayder 

  • Hi Devin,

    I'm still waiting your reply to this.

    Regards

    Hayder

  • Hi Hayder,

    I'm not able to follow your algorithm for determining which results to print. It seems overly complicated. It seems like this is likely the problem vs. any issues with the device or SCI module.
  • Hi Devin, 

    Please can you have a look at the full algorithm in the attached text file to point out if there is any problem. It's the adc_soc_epwm_cpu01.c example with some addition like the sci, I donn't know why saving the adc results to text file is limited even though I increased the RAM space for .text many times.

    Adc_epwm_sci.txt
    //###########################################################################
    //
    // FILE:   adc_soc_epwm_cpu01.c
    //
    // TITLE:  ADC triggering via epwm for F2837xD.
    //
    //! \addtogroup cpu01_example_list
    //! <h1> ADC ePWM Triggering (adc_soc_epwm)</h1>
    //!
    //! This example sets up the ePWM to periodically trigger the ADC.
    //!
    //! After the program runs, the memory will contain:\n
    //! - \b AdcaResults \b: A sequence of analog-to-digital conversion samples from
    //! pin A0. The time between samples is determined based on the period
    //! of the ePWM timer.
    //
    //###########################################################################
    // $TI Release: F2837xD Support Library v210 $
    // $Release Date: Tue Nov  1 14:46:15 CDT 2016 $
    // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
    //             http://www.ti.com/ ALL RIGHTS RESERVED $
    //###########################################################################
    
    //
    // Included Files
    //
    #include "F28x_Project.h"
    #include "stdio.h"
    #include "math.h"
    #include <string.h>
    #include <stdlib.h>
    #include <file.h>
    
    //
    // Function Prototypes
    //
    void ConfigureADC(void);
    void ConfigureEPWM(void);
    void SetupADCEpwm(Uint16 channel);
    interrupt void adca1_isr(void);
    
    
    void scia_echoback_init(void);
    void scia_fifo_init(void);
    void scia_xmit(int a);
    void scia_msg(char *msg);
    void send_result(Uint16 res);
    
    //
    // Defines
    //
    #define RESULTS_BUFFER_SIZE 64                  // the buffer size was 256
    FILE *myFile;
    //#define ADC_SAMPLE_PERIOD   0x1000            // 1999 = 50 kHz sampling w/ 100 MHz ePWM clock
    
    //
    // Globals
    //
    Uint16 AdcaResults[RESULTS_BUFFER_SIZE];
    Uint16 AdcaResults1[RESULTS_BUFFER_SIZE];    //float32 AdcaResults1[RESULTS_BUFFER_SIZE];
    
    Uint16 resultsIndex;
    Uint16 resultsIndex1;
    //Uint16 LoopCount;                         // from sci example
    volatile Uint16 bufferFull;
    volatile Uint16 bufferFull1;
    Uint16 Vin;
    
    
    int z;
    char *msg;
    
    void main(void)
    {
    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the F2837xD_SysCtrl.c file.
    //
        InitSysCtrl();
    
    //
    // Step 2. Initialize GPIO:
    // This example function is found in the F2837xD_Gpio.c file and
    // illustrates how to set the GPIO to it's default state.
    //
        InitGpio(); // Skipped for this example
    
    //
    // Step 3. Clear all interrupts and initialize PIE vector table:
    // Disable CPU interrupts
    //
        DINT;
    
    //
    // Initialize the PIE control registers to their default state.
    // The default state is all PIE interrupts disabled and flags
    // are cleared.
    // This function is found in the F2837xD_PieCtrl.c file.
    //
        InitPieCtrl();
    
    //
    // Disable CPU interrupts and clear all CPU interrupt flags:
    //
        IER = 0x0000;
        IFR = 0x0000;
    
    //
    // Initialize the PIE vector table with pointers to the shell Interrupt
    // Service Routines (ISR).
    // This will populate the entire table, even if the interrupt
    // is not used in this example.  This is useful for debug purposes.
    // The shell ISR routines are found in F2837xD_DefaultIsr.c.
    // This function is found in F2837xD_PieVect.c.
    //
        InitPieVectTable();
    
    //
    // Map ISR functions
    //
        EALLOW;
        PieVectTable.ADCA1_INT = &adca1_isr;                    //function for ADCA interrupt 1
        EDIS;
    
    //
    // Configure the ADC and power it up
    //
        ConfigureADC();
    
    //
    // Configure the ePWM
    //
       // ConfigureEPWM();
    
    //
    // Setup the ADC for ePWM triggered conversions on channel 0
    //
        SetupADCEpwm(0);
    
    //
    // Enable global Interrupts and higher priority real-time debug events:
    //
        IER |= M_INT1; //Enable group 1 interrupts
        EINT;  // Enable Global interrupt INTM
        ERTM;  // Enable Global realtime interrupt DBGM
    
    //
    // Initialize results buffer
    //
        for(resultsIndex = 0; resultsIndex < RESULTS_BUFFER_SIZE; resultsIndex++)
        {
            AdcaResults[resultsIndex] = 0;
    //        AdcbResults[resultsIndex] = 0;
    //        AdcdResults[resultsIndex] = 0;
        }
        resultsIndex = 0;
        bufferFull = 0;
    
        for(resultsIndex1 = 0; resultsIndex1 < RESULTS_BUFFER_SIZE; resultsIndex1++)
        {
            AdcaResults1[resultsIndex1] = 0;
     //       AdcbResults[resultsIndex] = 0;
    //        AdcdResults[resultsIndex] = 0;
        }
        resultsIndex1 = 0;
        bufferFull1 = 0;
    //
    // enable PIE interrupt
    //
        PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
    
    
    
       //
       // For this example, only init the pins for the SCI-A port.
       //  GPIO_SetupPinMux() - Sets the GPxMUX1/2 and GPyMUX1/2 register bits
       //  GPIO_SetupPinOptions() - Sets the direction and configuration of the GPIOS
       // These functions are found in the F2837xD_Gpio.c file.
       //
          GPIO_SetupPinMux(28, GPIO_MUX_CPU1, 1);
          GPIO_SetupPinOptions(28, GPIO_INPUT, GPIO_PUSHPULL);
          GPIO_SetupPinMux(29, GPIO_MUX_CPU1, 1);
          GPIO_SetupPinOptions(29, GPIO_OUTPUT, GPIO_ASYNC);
    
    
          scia_fifo_init();       // Initialize the SCI FIFO
          scia_echoback_init();   // Initialize SCI for echoback
    
          //msg = "\r\n\n\nHello World!\n\0";
          msg = "\r\n\nStart of Conversion: \n\n";
          scia_msg(msg);
    
         // msg = "\r\nYou will enter a character, and the DSP will echo it back! \n\0";
         // scia_msg(msg);
    
    
    //
    // sync ePWM
    //
        EALLOW;
        CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
    
        
    
    //     
    //
    //take conversions indefinitely in loop,   this loop is used with the pwm trigger
    //
        do
        {
            //
            //start ePWM
            //
            EPwm1Regs.ETSEL.bit.SOCAEN = 1;  //enable SOCA
            EPwm1Regs.TBCTL.bit.CTRMODE = 0; //unfreeze, and enter up count mode
    
          //  AdcaRegs.ADCSOCFRC1.all = 0x0001;
    
            //
            //wait while ePWM causes ADC conversions, which then cause interrupts,
            //which fill the results buffer, eventually setting the bufferFull
            //flag
            //
            while(!bufferFull);
            bufferFull = 0; //clear the buffer full flag
        
            while(!bufferFull1);
            bufferFull1 = 0; //clear the buffer full flag
    
            //
            //stop ePWM
            //
            EPwm1Regs.ETSEL.bit.SOCAEN = 0;  //disable SOCA
            EPwm1Regs.TBCTL.bit.CTRMODE = 3; //freeze counter
    
    
            //
            //at this point, AdcaResults[] contains a sequence of conversions
            //from the selected channel
            //
    
            msg = "\r\n\n\nConversion finished!\n\n";
            scia_msg(msg);
    
            //
            //software breakpoint, hit run again to get updated conversions
            //
            asm("   ESTOP0");
    
        }while(1);
    }
    
    
    
    //
    // ConfigureADC - Write ADC configurations and power up the ADC for both
    //                ADC A and ADC B
    //
    void ConfigureADC(void)
    {
        EALLOW;
    
        //
        //write configurations
        //
        AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4     was 6
        AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
    
        //
        //Set pulse positions to late
        //
        AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    
    
        //
        //power up the ADC
        //
        AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
    
    
        //
        //delay for 1ms to allow ADC time to power up
        //
        DELAY_US(1000);
    
        EDIS;
    }
    
    //
    // ConfigureEPWM - Configure EPWM SOC and compare values
    //
    void ConfigureEPWM(void)
    {
        EALLOW;
        // Assumes ePWM clock is already enabled
        EPwm1Regs.ETSEL.bit.SOCAEN    = 0;    // Disable SOC on A group
        EPwm1Regs.ETSEL.bit.SOCASEL    = 4;   // Select SOC on up-count
        EPwm1Regs.ETPS.bit.SOCAPRD = 1;       // Generate pulse on 1st event
        EPwm1Regs.CMPA.bit.CMPA = 0x0800;     // Set compare A value to 2048 counts,   it was 0x0800
        EPwm1Regs.TBPRD = 0x1000;             // Set period to 4096 counts,     it was 0x1000
        EPwm1Regs.TBCTL.bit.CTRMODE = 3;      // freeze counter
        EDIS;
    }
    
    //
    // SetupADCEpwm - Setup ADC EPWM acquisition window
    //
    void SetupADCEpwm(Uint16 channel)
    
    {
        Uint16 acqps;
    
        //
        //determine minimum acquisition window (in SYSCLKS) based on resolution
        //
        if(ADC_RESOLUTION_12BIT == AdcaRegs.ADCCTL2.bit.RESOLUTION)
        {
            acqps = 14; //75ns
        }
        else //resolution is 16-bit
        {
            acqps = 63; //320ns
        }
    
        //
        //Select the channels to convert and end of conversion flag
        //
        EALLOW;
        AdcaRegs.ADCSOC0CTL.bit.CHSEL = channel;  //SOC0 will convert pin A0
        AdcaRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
        AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 1; //trigger on ePWM1 SOCA/C = 5,  OR = 1 for cpu.timer0 trigger
        AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag
        AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;   //enable INT1 flag
        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
    
           AdcaRegs.ADCSOC1CTL.bit.CHSEL = 1;  //SOC1 will convert pin A1
           AdcaRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
           AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 1; //trigger on ePWM1 SOCA/C = 5, OR = 1 for cpu.timer0 trigger
           AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag
           AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;   //enable INT1 flag
           AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
    
        EDIS;
    }
    
    
    //
    // adca1_isr - Read ADC Buffer in ISR
    //
    interrupt void adca1_isr(void)
    {
        AdcaResults[resultsIndex++] =AdcaResultRegs.ADCRESULT0;
    
        if(RESULTS_BUFFER_SIZE == resultsIndex)
        {
            for (z=0;z<RESULTS_BUFFER_SIZE;z++)
    {
        Vin = AdcaResults[z];
       send_result(Vin);
        }
        }
    
            int k = 0, Vin1;
         if (k <8000 && RESULTS_BUFFER_SIZE == resultsIndex )
         {
            myFile = fopen("C:\\ti\\C2000Ware_1_00_03_00_Software\\device_support\\f2837xd\\examples\\cpu1\\adc_soc_epwm\\AdcaResults1.txt","w");
    
            if( myFile == NULL )
               {
                  printf("Error while opening the file 2222.\n");
               }
    
        for (k=0;k<64;k++)
        {
             Vin1 = AdcaResults[k];
             fprintf(myFile,"%d ",Vin1);
        }
         }
        else if(k == 8000)
        {
            fclose(myFile);
        }
    
    
        if(RESULTS_BUFFER_SIZE <= resultsIndex)
        {
            resultsIndex = 0;
            bufferFull = 1;
        }
    
    
    //    AdcaResults1[resultsIndex1++] = (float32) AdcaResultRegs.ADCRESULT1 * (float32)(3/3096);
        AdcaResults1[resultsIndex1++] = AdcaResultRegs.ADCRESULT1;
        if(RESULTS_BUFFER_SIZE <= resultsIndex1)
        {
                resultsIndex1 = 0;
                bufferFull1 = 1;
            }
    
        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
        PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
    }
    
    
    
    //
    //  scia_echoback_init - Test 1,SCIA  DLB, 8-bit word, baud rate 0x000F,
    //                       default, 1 STOP bit, no parity
    //
    
    void scia_echoback_init()
    {
        //
        // Note: Clocks were turned on to the SCIA peripheral
        // in the InitSysCtrl() function
        //
    
        SciaRegs.SCICCR.all = 0x0007;   // 1 stop bit,  No loopback
                                        // No parity,8 char bits,
                                        // async mode, idle-line protocol
        SciaRegs.SCICTL1.all = 0x0003;  // enable TX, RX, internal SCICLK,
                                        // Disable RX ERR, SLEEP, TXWAKE
        SciaRegs.SCICTL2.all = 0x0003;
        SciaRegs.SCICTL2.bit.TXINTENA = 1;
        SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
    
        //
        // SCIA at 9600 baud
        // @LSPCLK = 50 MHz (200 MHz SYSCLK) HBAUD = 0x02 and LBAUD = 0x8B.
        // @LSPCLK = 30 MHz (120 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x86.
        //
        SciaRegs.SCIHBAUD.all = 0x0002;                  // was 0x0002
        SciaRegs.SCILBAUD.all = 0x008A;                  // was 0x008B
    
        SciaRegs.SCICTL1.all = 0x0023;  // Relinquish SCI from Reset
    }
    
    //
    // scia_xmit - Transmit a character from the SCI
    //
    void scia_xmit(int a)
    {
        while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
        SciaRegs.SCITXBUF.all =a;
    }
    
    
    //
    // scia_msg - Transmit message via SCIA
    //
    void scia_msg(char * msg)
    {
        int i;
        i = 0;
         while(msg[i] != '\0')
    
    
        {
            scia_xmit(msg[i]);
            i++;
        }
    }
    
    
    // scia_fifo_init - Initialize the SCI FIFO
    //
    void scia_fifo_init()
    {
        SciaRegs.SCIFFTX.all = 0xE040;
        SciaRegs.SCIFFRX.all = 0x2044;
        SciaRegs.SCIFFCT.all = 0x0;
    }
    
    
    void send_result(Uint16 res)
    {
     int b3,b2,b1,b0;
     b3 = (res/1000)+48;
     b2 = ((res%1000)/100)+48;
     b1 = ((res%100)/10)+48;
     b0 = (res%10)+48;
     scia_xmit(b3);
     scia_xmit(b2);
     scia_xmit(b1);
     scia_xmit(b0);
     msg = ",   ";
     scia_msg (msg);
    
    
     return;
    }
    
    //
    // End of file
    //
    

    Moreover, how can I check if there is a problem with the device or the sci module.
    Kind regards 

    Hayder

  • Hi Hayder,

    One thing you may want to try is moving the save-to-file loop outside of the ADC ISR into the background loop. You usually don't want such a long-running chunk of code in an ISR.
  • Hi Devin,

    I move save-to-file loop to the program main loop and then I moved it to the function that sending the adc array to the hyperterminal (void send_result(Uint16 res)) at the end end of the text file in my previous reply.
    In both cases, it didn't save any the to the file. then I simplified the code to just, open the file and write to it, also nothing is written to the file.

    One thing I'm not quite sure about it, what do you mean by the "background loop"?

    Regards
  • Hi Hayder,

    The background loop is what is running in main() that will be interrupted by the ADC ISR. There is where you want to do less time-critical tasks like iterating through a list of values to scan-out.
  • Hi devin, 

    I kept the Save-to-text loop in the adc_isr but I changed the allocated in the RAM for the .text as following: 

    MEMORY
    {
    PAGE 0 :
    /* BEGIN is used for the "boot to SARAM" bootloader mode */

    BEGIN : origin = 0x000000, length = 0x000002
    RAMM0 : origin = 0x000122, length = 0x0002DE  
    RAMD0 : origin = 0x00B000, length = 0x000800
    RAMLS0 : origin = 0x008000, length = 0x002000            // this was 0x000800

    // RAMLS1 : origin = 0x008800, length = 0x000800 // was 0x000800
    // RAMLS2 : origin = 0x009000, length = 0x000800 // was 0x000800
    // RAMLS3 : origin = 0x009800, length = 0x000800 // was 0x000800
    // RAMLS4 : origin = 0x00A000, length = 0x000800 // was 0x000800


    RAMGS10 : origin = 0x016000, length = 0x001000    // I moved  this here from page 1 in order to fprintf the adc result to a text file 
    RAMGS11 : origin = 0x017000, length = 0x001000    // // I added this here 
    RAMGS12 : origin = 0x018000, length = 0x003000    // I moved this from page 1 so that 
    RESET : origin = 0x3FFFC0, length = 0x000002

    and then in RAM section i edited the .text  to:

       .text            : >>RAMM0 | RAMD0|  RAMLS0| RAMGS10| RAMGS11| RAMGS12,   PAGE = 0

    After these changes in the RAM, I've been able to store up to 1024 adc result to the opened text file. 

    I have question as I don't understand how it's work because the length of the RAMGS12 originally was 0x001000 and I was not able to store adc array of 64, but when I accidentally chaged it to 0x003000 as above, I've been able to save an array of 1024 of adc results. Moreover, is it correct to put it as 0x003000 as the other RAMSG are all 0x001000. 

    Kind Regards 

    Hayder  

  • Hi Hayder,

    The physical RAM is only 0x1000 but you can combine contiguous RAMs of the same type by increasing the length.

    Just make sure you comment out the other RAMs that also occupy that space...otherwise you can assign multiple variables to the same memory location. This is not something you want to have to debug.