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TMS320F28335: PWM_INIT_MACRO in <f2833xpwm.h>

Part Number: TMS320F28335
Other Parts Discussed in Thread: CONTROLSUITE

Dear Champs,

I am running HVPM_Sensorless_2833x demo on HVmotor Kit and confusing with the PWM_INIT_MACRO in <f2833xpwm.h>.  The file path is C:\ti\controlSUITE\libs\app_libs\motor_control\drivers\f2833x_v2.0

This Macro set *ePWM[chx].TBCTL.bit.PHSEN=1 firstly and then let ' *ePWM[chx]).TBCTL.all = PWM_INIT_STATE'  while the PWM_INIT_STATE not contained PHSEN.

could you please kindly help to let me know why using this way? thanks a lot!

#define PWM_INIT_MACRO(ch1,ch2,ch3,v)										\
	     /* Setup Sync*/													\
         (*ePWM[ch1]).TBCTL.bit.SYNCOSEL = 0;       /* Pass through*/		\
		 (*ePWM[ch2]).TBCTL.bit.SYNCOSEL = 0;       /* Pass through*/		\
		 (*ePWM[ch3]).TBCTL.bit.SYNCOSEL = 0;       /* Pass through*/		\
		 																	\
         /* Allow each timer to be sync'ed*/								\
         (*ePWM[ch1]).TBCTL.bit.PHSEN = 1;									\
         (*ePWM[ch2]).TBCTL.bit.PHSEN = 1;									\
         (*ePWM[ch3]).TBCTL.bit.PHSEN = 1;									\
         																	\
         /* Init Timer-Base Period Register for EPWM1-EPWM3*/				\
         (*ePWM[ch1]).TBPRD = v.PeriodMax;									\
         (*ePWM[ch2]).TBPRD = v.PeriodMax;									\
         (*ePWM[ch3]).TBPRD = v.PeriodMax;									\
																			\
         /* Init Timer-Base Phase Register for EPWM1-EPWM3*/				\
         (*ePWM[ch1]).TBPHS.half.TBPHS = 0;									\
         (*ePWM[ch2]).TBPHS.half.TBPHS = 0;									\
         (*ePWM[ch3]).TBPHS.half.TBPHS = 0;									\
																			\
         /* Init Timer-Base Control Register for EPWM1-EPWM3*/				\
         (*ePWM[ch1]).TBCTL.all = PWM_INIT_STATE;							\
		 (*ePWM[ch2]).TBCTL.all = PWM_INIT_STATE;							\
		 (*ePWM[ch3]).TBCTL.all = PWM_INIT_STATE;							\
																			\

/*----------------------------------------------------------------------------
Initialization constant for the F2833X Time-Base Control Registers for PWM Generation. 
Sets up the timer to run free upon emulation suspend, count up-down mode
prescaler 1.
----------------------------------------------------------------------------*/
#define PWM_INIT_STATE ( FREE_RUN_FLAG +         \
                         PRDLD_IMMEDIATE  +       \
                         TIMER_CNT_UPDN +         \
                         HSPCLKDIV_PRESCALE_X_1 + \
                         CLKDIV_PRESCALE_X_1  +   \
                         PHSDIR_CNT_UP    +       \
                         CNTLD_DISABLE )

  • Hi Gavin,

    This code is to implement the time base counter (TBCTR) synchronization.
    Setting TBCTL[SYNCOSEL] = 00 allows EPWMxSYNCI (Synchronization Input Pulse) to be chosen for SYNCOSEL and setting TBCTL[PHSEN] = 1 allows the value of TBPHS to be written to TBCTR when EPWMxSYNCI occurs. As TBPHS is set to 0 for all 3 channels by this macro, this synchronizes TBCTR across EPWM channels 1-3.

    Regards,
    Elizabeth
  • Hi Elizabeth,

    Thanks a lot for your quick reply. Sorry for my question not so clear...

    According to the detail codes of PWM_INIT_MACRO, the PHSEN bit was set firstly and then initiate the whole TBCTL register using statement:   (*ePWM[ch1]).TBCTL.all = PWM_INIT_STATE; and the "PWM_INIT_STATE" definition does NOT include PHSEN bit.

    My question is: 

    1. Why initiate "SYNCOSEL" & "PHSEN" bits independently? 

    2.  "SYNCOSEL" & "PHSEN" bits will be modified by "(*ePWM[ch1]).TBCTL.all = PWM_INIT_STATE; " statement, is that what we want?

  • Hi Gavin,

    By initializing SYNCOSEL to select EPWMxSYNCI and PHSEN = 1, the TBCTR can be synchronized with the value of TBPHS across the EPWM channels. So with this macro's configuration, it can be ensured TBCTR = TBPHS = 0 for EPWM1-EPWM3 once EPWMxSYNCI pulse occurs. After that, PHSEN is cleared to disable phase shift. The PHSEN can be set again if the application you're working with requires phase shift.

    Regards,
    Elizabeth
  • Thank you Elizabeth.