Other Parts Discussed in Thread: TMS320F28375S,
Hello,
Please let me ask about enabling the C28346 XINTF.
Is it required to write 3=Asynchronous to GPxQSELn[GPIO*] bitfields?
For example, GPAQSEL2[GPIO29] controls qualification of the External Interface Address Line 19.
I could not find such a requirements from the C28346 documents, although the F2837xS TRM requires the GPxQSELy[GPIOz] bitfields to have 3=Asynchronous.