This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377D: SDFM Issue - Interfacing with AMC1303M2520

Part Number: TMS320F28377D
Other Parts Discussed in Thread: AMC1303M2520,

Hello, everyone

We have a question related to interfacing Sigma-Delta Modulator AMC1303M2520 with SD Filter on F2837xD. The problem is in AMC data hold and delay time after rising edge of CLKOUT: the datasheet says, that data is held for at least 7 ns, and then changed not more than 15 ns later. The MCU latches data at rising edge of CLKOUT. 

In common cases if data changes with the rising edge, then it sould be read with the falling edge and vice versa. Otherwise there is a possibility of MCU captures wrong data.

Do I have to invert CLKOUT of the AMC1303 in this case to improve reliability?

  • Hello again.

    So is there any information on this?

    To make it clear i'm providing two pictures, showing what MCU needs to get, and what AMC gives to the MCU. On the first picture it's seen, that SD filter of the MCU needs data to be stable on the rising edge of CLK, and the second picture shows, that AMC changes data right after the rising edge of the CLK.

  • Disona,

    Attached is the snippet of SDFM mode0 timing diagram from Soprano DS which shows the setup and hold time for mode0. I don't see how AMC1303 violates Soprano DS requirement. I believe inverting the CLKOUT should possibly make setup time more stringent and hold time more relaxed. Anyway, You can invert the  CLKOUT by using GPyINV register. For example, if CLKOUT is connected to GPIO17, then you can configure GpioCtrlRegs.GPAINV.bit.GPIO17 = 1 to invert the CLKOUT signal.

    Regards,

    Manoj

  • Thank you for the answer.
    But i don't get - what is Soprano DS (couldn't find any datasheets using this query) and what are values for the timings on this picture?

    Anyway i'd like to mention, that we cheked our design and there was no need to invert CLK signal - MCU captures data correctly.
  • I was talking about TMS320F28377D datasheet. The value of the timing are mentioned in SDFM Timing Requirement section in datasheet.

    Glad to know that SDFM is working.

    Regards,
    Manoj
  • Thank you for your help.
    Indeed, requirements are satisfied, but still I think that the time corridor is too narrow. MCU needs at least 5 ns for data to be stable and AMC can switch data after 7 ns...
    Anyway it's good that we have possibility to invert gpio inside MCU.