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TMS320F2812: Silicon Cut-in for PLL Lock Time increase from 4096 to 131072 XCLKIN cycles

Part Number: TMS320F2812

I'm looking at the Rev t of the SPRS174 (data manual for the TMS320F2812). Note 4 for Table 6.14.2 states the PLL lock time (max) was changed. 4096 XCLKIN cycles in earlier silicon versions to the present 131072 XCLKIN cycles.

Can you identify the cut-in of the silicon with the longer PLL lock times and how I'd identify the part marking of the silicon on the package?

  • Debbie,
    I'm looking into this and should have an answer by tomm for the cut in dates for the PLL lock times.

    In terms of the revision identifier, on the package the 2nd line has a Cx-zzzzz identifier. The "x" will be a letter from A-G, and will indicate the silicon revision of the device. Rev 0 would be no letter.

    The errata details which revisions were shipped into production(TMS), in this case there should only be CC/CE/CG that could be TMS. revG is current TMS product. All others were either TMX(pre-production) or internal.

    The DS was last revised in May 2012, so this has been applicable at least for that amount of time.

    Best,
    Matthew
  • Debbie,

    This changed from DS rev G to DS revH, both of which were in 2003.  More importantly this change happened before the device was TMS(production status).  Any device that was manufactured as TMS(revC and later) the newer/longer PLL lock time was already in the DS and has not changed since(also 2003).  More than likely this parameter was still being characterized before TMS, and once char was complete the number was finalized and updated accordingly.

    This also explains why there is no mention in the errata, until a device reaches production status the DS may have TYP instead of MAX/MIN or changes like this.  Once the device is TMS and the DS is released corresponding to production status any change in a MAX/MIN will be listed in the errata.

    Let me know if this answers your question.

    Best,
    Matthew