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CCS/TMS320F28069M: Interrupt Problem

Part Number: TMS320F28069M
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Sir/Madam,

When I am configuring an ADC peripheral in 28069M the execution sequence is not entering interrupt. Previously when I worked on 28027 the same program is executed and it is entering the interrupt. Please help me.

https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/732330

  • processors.wiki.ti.com/.../C2000_Archived_Workshops has a multi-day workshop for the F28069, including a lab on the ADC. I would take a look at that to get an in-depth treatment of the F28069 ADC. There is also example code on C2000Ware under "device support", but I recommend going to the archived workshop first.

    Hopefully, that helps.
  • ADDAGUDURU,

    Yes, please take a look at the F28069 multi-day workshop. (Thanks Todd). To enable the ADC interrupt (PIE 1.1) the code would be:

    //--- Enable the ADC interrupt
    PieCtrlRegs.PIEIER1.bit.INTx1 = 1; // Enable ADCINT1 in PIE group 1
    IER |= 0x0001; // Enable INT1 in IER to enable PIE group

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken
  • Sir ,
    That's fine. Actually I am working on sine PWM generation. It worked very well. I used cpu timers to vary the frequency. It is also working fine. When I am configuring ADC peripheral the problem is that SOC is taking place but it is not entering into the interrupt. I am generating interrupt with cpu timers. Please help me
    Thanks and Regards,
    Surya Kiran
  • Surya,

    Check to make sure you have the following set (for whichever SOC you are using):

    AdcRegs.ADCINTSOCSEL1.bit.SOC0 = 0; // No ADCINT triggers SOC0. TRIGSEL field determines trigger.

    This will use the trigger select field in the SOC rather than having an ADC interrupt re-trigger. Also, check the following:

    /--- ADCINT1 configuration
    AdcRegs.INTSEL1N2.bit.INT1CONT = 1; // ADCINT1 pulses regardless of ADCINT1 flag state
    AdcRegs.INTSEL1N2.bit.INT1E = 1; // Enable ADCINT1
    AdcRegs.INTSEL1N2.bit.INT1SEL = 0; // EOC0 triggers ADCINT1

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken
  • Surya,

    It's been a while since we have heard from you last. Therefore, we are assuming you were able to resolve your issue. If this isn’t the case, please reject this resolution or reply to this thread. If this thread locks, please make a new thread describing the current status of your issue. Thank you.

    - Ken
  • sir,
    By mistake i pressed the option resolved my issue but the issue was still not resolved. I am facing the same problem 

  • Surya,

    You will need to provide more information. Could you let me know if you were able to get into the ISR one time, but not thereafter? Test this by placing a breakpoint at the beginning of the ISR. Perhaps you could send a snippet of the code that you are having the problem with.

    - Ken
  • Sir,

    Thanks for your reply. It is not at all entering the ISR. I had inserted the complete code below. Please trace out the issue.

    #include "DSP28x_Project.h"
    # define period 6000
    # define V_tri 0x0FFF
    int index = 0;
    float freq, f=50, T;
    float Mi;
    //int V_sine=0;
    //float sine[512];
    float value[512]={0.0123, 0.0245, 0.0368, 0.0491, 0.0613, 0.0736, 0.0858, 0.0980, 0.1102, 0.1224, 0.1346, 0.1467, 0.1589, 0.1710, 0.1830, 0.1951, 0.2071, 0.2191, 0.2311, 0.2430,
                      0.2549, 0.2667, 0.2785, 0.2903, 0.3020, 0.3137, 0.3253, 0.3369, 0.3484, 0.3599, 0.3713, 0.3827, 0.3940, 0.4052, 0.4164, 0.4276, 0.4386, 0.4496, 0.4605, 0.4714,
                      0.4822, 0.4929, 0.5035, 0.5141, 0.5246, 0.5350, 0.5453, 0.5556, 0.5657, 0.5758, 0.5858, 0.5957, 0.6055, 0.6152, 0.6249, 0.6344, 0.6438, 0.6532, 0.6624, 0.6716,
                      0.6806, 0.6895, 0.6984, 0.7071, 0.7157, 0.7242, 0.7327, 0.7410, 0.7491, 0.7572, 0.7652, 0.7730, 0.7807, 0.7883, 0.7958, 0.8032, 0.8105, 0.8176, 0.8246, 0.8315,
                      0.8382, 0.8449, 0.8514, 0.8577, 0.8640, 0.8701, 0.8761, 0.8819, 0.8876, 0.8932, 0.8987, 0.9040, 0.9092, 0.9142, 0.9191, 0.9239, 0.9285, 0.9330, 0.9373, 0.9415,
                      0.9456, 0.9495, 0.9533, 0.9569, 0.9604, 0.9638, 0.9670, 0.9700, 0.9729, 0.9757, 0.9783, 0.9808, 0.9831, 0.9853, 0.9873, 0.9892, 0.9909, 0.9925, 0.9939, 0.9952,
                      0.9963, 0.9973, 0.9981, 0.9988, 0.9993, 0.9997, 0.9999, 1.0000, 0.9999, 0.9997, 0.9993, 0.9988, 0.9981, 0.9973, 0.9963, 0.9952, 0.9939, 0.9925, 0.9909, 0.9892,
                      0.9873, 0.9853, 0.9831, 0.9808, 0.9783, 0.9757, 0.9729, 0.9700, 0.9670, 0.9638, 0.9604, 0.9569, 0.9533, 0.9495, 0.9456, 0.9415, 0.9373, 0.9330, 0.9285, 0.9239,
                      0.9191, 0.9142, 0.9092, 0.9040, 0.8987, 0.8932, 0.8876, 0.8819, 0.8761, 0.8701, 0.8640, 0.8577, 0.8514, 0.8449, 0.8382, 0.8315, 0.8246, 0.8176, 0.8105, 0.8032,
                      0.7958, 0.7883, 0.7807, 0.7730, 0.7652, 0.7572, 0.7491, 0.7410, 0.7327, 0.7242, 0.7157, 0.7071, 0.6984, 0.6895, 0.6806, 0.6716, 0.6624, 0.6532, 0.6438, 0.6344,
                      0.6249, 0.6152, 0.6055, 0.5957, 0.5858, 0.5758, 0.5657, 0.5556, 0.5453, 0.5350, 0.5246, 0.5141, 0.5035, 0.4929, 0.4822, 0.4714, 0.4605, 0.4496, 0.4386, 0.4276,
                      0.4164, 0.4052, 0.3940, 0.3827, 0.3713, 0.3599, 0.3484, 0.3369, 0.3253, 0.3137, 0.3020, 0.2903, 0.2785, 0.2667, 0.2549, 0.2430, 0.2311, 0.2191, 0.2071, 0.1951,
                      0.1830, 0.1710, 0.1589, 0.1467, 0.1346, 0.1224, 0.1102, 0.0980, 0.0858, 0.0736, 0.0613, 0.0491, 0.0368, 0.0245, 0.0123, 0.0000, -0.0123, -0.0245, -0.0368, -0.0491,
                      -0.0613, -0.0736, -0.0858, -0.0980, -0.1102, -0.1224, -0.1346, -0.1467, -0.1589, -0.1710, -0.1830, -0.1951, -0.2071, -0.2191, -0.2311, -0.2430, -0.2549, -0.2667,
                      -0.2785, -0.2903, -0.3020, -0.3137, -0.3253, -0.3369, -0.3484, -0.3599, -0.3713, -0.3827, -0.3940, -0.4052, -0.4164, -0.4276, -0.4386, -0.4496, -0.4605, -0.4714,
                      -0.4822, -0.4929, -0.5035, -0.5141, -0.5246, -0.5350, -0.5453, -0.5556, -0.5657, -0.5758, -0.5858, -0.5957, -0.6055, -0.6152, -0.6249, -0.6344, -0.6438, -0.6532,
                      -0.6624, -0.6716, -0.6806, -0.6895, -0.6984, -0.7071, -0.7157, -0.7242, -0.7327, -0.7410, -0.7491, -0.7572, -0.7652, -0.7730, -0.7807, -0.7883, -0.7958, -0.8032,
                      -0.8105, -0.8176, -0.8246, -0.8315, -0.8382, -0.8449, -0.8514, -0.8577, -0.8640, -0.8701, -0.8761, -0.8819, -0.8876, -0.8932, -0.8987, -0.9040, -0.9092, -0.9142,
                      -0.9191, -0.9239, -0.9285, -0.9330, -0.9373, -0.9415, -0.9456, -0.9495, -0.9533, -0.9569, -0.9604, -0.9638, -0.9670, -0.9700, -0.9729, -0.9757, -0.9783, -0.9808,
                      -0.9831, -0.9853, -0.9873, -0.9892, -0.9909, -0.9925, -0.9939, -0.9952, -0.9963, -0.9973, -0.9981, -0.9988, -0.9993, -0.9997, -0.9999, -1.0000, -0.9999, -0.9997,
                      -0.9993, -0.9988, -0.9981, -0.9973, -0.9963, -0.9952, -0.9939, -0.9925, -0.9909, -0.9892, -0.9873, -0.9853, -0.9831, -0.9808, -0.9783, -0.9757, -0.9729, -0.9700,
                      -0.9670, -0.9638, -0.9604, -0.9569, -0.9533, -0.9495, -0.9456, -0.9415, -0.9373, -0.9330, -0.9285, -0.9239, -0.9191, -0.9142, -0.9092, -0.9040, -0.8987, -0.8932,
                      -0.8876, -0.8819, -0.8761, -0.8701, -0.8640, -0.8577, -0.8514, -0.8449, -0.8382, -0.8315, -0.8246, -0.8176, -0.8105, -0.8032, -0.7958, -0.7883, -0.7807, -0.7730,
                      -0.7652, -0.7572, -0.7491, -0.7410, -0.7327, -0.7242, -0.7157, -0.7071, -0.6984, -0.6895, -0.6806, -0.6716, -0.6624, -0.6532, -0.6438, -0.6344, -0.6249, -0.6152,
                      -0.6055, -0.5957, -0.5858, -0.5758, -0.5657, -0.5556, -0.5453, -0.5350, -0.5246, -0.5141, -0.5035, -0.4929, -0.4822, -0.4714, -0.4605, -0.4496, -0.4386, -0.4276,
                      -0.4164, -0.4052, -0.3940, -0.3827, -0.3713, -0.3599, -0.3484, -0.3369, -0.3253, -0.3137, -0.3020, -0.2903, -0.2785, -0.2667, -0.2549, -0.2430, -0.2311, -0.2191,
                      -0.2071, -0.1951, -0.1830, -0.1710, -0.1589, -0.1467, -0.1346, -0.1224, -0.1102, -0.0980, -0.0858, -0.0736, -0.0613, -0.0491, -0.0368, -0.0245, -0.0123, -0.0000};
    __interrupt void cpu_timer0_isr(void);
    void InitEPwm1Example(void);
    void main(void)
    {
        InitSysCtrl();
        InitEPwm1Gpio();
        DINT;
        InitPieCtrl();
        IER = 0x0000;
        IFR = 0x0000;
        InitPieVectTable();
        EALLOW;
        PieVectTable.TINT0= &cpu_timer0_isr;
        EDIS;
        EALLOW;
        SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
        EDIS;
        InitEPwm1Example();
        EALLOW;
        SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
        EDIS;
        InitAdc();
        //AdcOffsetSelfCal();
        T= 1/f;
        freq=T/(0.000512);
        InitCpuTimers();
        ConfigCpuTimer(&CpuTimer0, 80, freq);
        CpuTimer0Regs.TCR.all = 0x4000;
        IER |= M_INT1;
        PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
        EINT;
        ERTM;
        for(;;);
    }
    void InitEPwm1Example()
    {
    // Setup TBCLK
    EPwm1Regs.TBPRD = period;
    EPwm1Regs.TBPHS.half.TBPHS = 0x0000;
    EPwm1Regs.TBCTR = 0x0000;
    // Setup counter mode
    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
    // Setup shadowing
    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;  // A²»·­×ª£¬B·­×ª
    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm1Regs.DBRED = 480; // Deadzone
    EPwm1Regs.DBFED = 480;
    // Interrupt where we will change the Compare Value
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;     /* Enable SOCA */
    EPwm1Regs.ETSEL.bit.SOCASEL = 2;    /* Enable period event for SOCA */
    EPwm1Regs.ETPS.bit.SOCAPRD = 1;     /* Generate SOCA on the 1st event */
    EPwm1Regs.ETCLR.bit.SOCA = 1;       /* Clear SOCA flag */
    EALLOW;
    AdcRegs.ADCCTL2.bit.ADCNONOVERLAP = 1;
    AdcRegs.ADCSOC1CTL.bit.ACQPS=6;
    AdcRegs.ADCSOC1CTL.bit.CHSEL=4;
    AdcRegs.ADCSOC1CTL.bit.TRIGSEL=5;
    EDIS;
    }
        __interrupt void cpu_timer0_isr(void)
        {
           index++;
           Mi= (AdcResult.ADCRESULT1)/V_tri;
           EPwm1Regs.CMPA.half.CMPA =Mi*(period/2)*(1+value[index]);
                if (index>511)
                  {
                      index=0;
                  }
                  if(EPwm1Regs.TBPRD>(Mi*(period/2)*(1+value[index])))
                  {
                      EPwm1Regs.AQCTLA.bit.CAU=AQ_SET;
                      EPwm1Regs.AQCTLA.bit.CAD=AQ_CLEAR;
                  }
                      else
                      {
                          EPwm1Regs.AQCTLB.bit.CAU=AQ_CLEAR;
                          EPwm1Regs.AQCTLB.bit.CAD=AQ_SET;
                      }
           PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
        }
    Thanks &Regards,
    Surya
  • Surya,

    What you have looks good, but you did not answer my question in the previous post:

    "Could you let me know if you were able to get into the ISR one time, but not thereafter? Test this by placing a breakpoint at the beginning of the ISR."

    Reviewing the timer initialization below looks fine, but could you test this by writing a value directly for freq instead (e.g. 40 for 40 us)?

    InitCpuTimers();
    ConfigCpuTimer(&CpuTimer0, 80, freq);
    CpuTimer0Regs.TCR.all = 0x4000;
    IER |= M_INT1;
    PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
    EINT;
    ERTM;
    for(;;);

    Next, in CCS check if the timer is counting. If not, then check the peripheral clock to the timer.

    Reviewing your ISR looks fine, too. You included:

    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

    which acknowledges this interrupt to receive more interrupts from group 1.

    So, please check:
    1) If you ever get into the ISR with a breakpoint
    2) Check that the counter is counting by viewing the registers
    3) Write the freq value directly and see if this helps

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken
  • sir, 

    I have answered questions in the previous post

    1)If you ever get into the ISR with a breakpoint

    Ans)  I used breakpoints at different locations in the program but the program flow didn't stop.Then I checked breakpoint properties it is displaying as shown below.

    2)Check that the counter is counting by viewing the registers

    I checked CPU timer registers and remaining peripheral registers were updating or not. They were updating. I think that there is no problem in the registers.

    3)Write the freq value directly and see if this helps

    I removed the variable and substituted it with a value. It is not working fine. 

  • Hi Surya,

    Have you tried your program without the EPWM/ADC configuration? i.e. just configuring the CPU timer (and needed lines of code) and see if the interrupt is entered.

    Also, could you try the CPU timer C2000ware example and see if the interrupts are entered ok:

    C:\ti\c2000\C2000Ware_1_00_05_00\device_support\f2806x\examples\c28\cpu_timer

    If the example works this could be used as a basis to compare your code to.

    Best,
    Kevin

  • sir,
    I changed the code adding few lines to blink led.
    EALLOW;
    GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0;
    GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1;
    EDIS;
    and
    GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;(Added in ISR)
    I found that the program flow is entering interrupt but in ADC Result Regs. i am getting values less than 0X0FFF i.e.., less than 4095 . When i am applying 3.3 V at input of ADC. I am having one more query that it is displaying modulation index(Mi) zero in the watch window. But the expected value is near value to one or one. why it is happening??
  • Hi Surya,

    Around what ADC result values are you seeing at 3.3V? Are you using internal or external reference voltage?

    Best,
    Kevin
  • Sir,
    1. Around what ADC result values are you seeing at 3.3V?
    ans) I am getting values between 0x0FD1 to 0x0FFA
    2. Are you using internal or external reference voltage?
    ans) I am using internal reference.
  • Surya,

    The ADC values that you are converting for 3.3V are within the datasheet specifications for Gain Error:

    -Tommy

  • Can you just brief how to use this data sheet so that I could understand
  • Surya,

    You have posed a very open-ended question that I'm not sure how to answer.  Is there a particular property or specification that needs clarification?

    These TI training videos for ADCs might be useful.  Keep in mind that this series is focused on discrete SAR ADCs, which are different from the embedded ADC on F2806x.  However, the information still largely applies.

    You can also read through this other discussion on total ADC error for F2803x, which shares the same ADC design as F2806x.

    -Tommy