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TMS320F280049: Layout guide and analog/digital ground separation

Part Number: TMS320F280049

Dear Champs,

I am asking this for our customers.

1. Schematic for analog/digital domain

On F280049C control card, it seems we only separate MCU_3V3 (digital) and MCU_A_3V3 (analog) by beads, but we don't on purpose separate analog and digital ground.

VSS and VSSA are connected to GND together.

Why don't we need to separate them?

2. Layout for analog/digital domain

Does that mean we don't even separate analog and digital power domain in layout?

3. Layout guide

Do we have any layout guide for F28004x?

Or can we follow sec 4.6 of the old layout guide:

spraas1d.pdf

Wayne Huang

  • Hello there Wayne,

    Tommy had a great reply here: e2e.ti.com/.../2595857
    Essentially, separating the planes can help to protect against digital switching noise from affecting the Analog domain. It is difficult to quantify that benefit, as it is highly dependent on layout (and skill in such a layout). Having the separated voltage domains even though grounds are tied together will help in that respect as well.

    Generally yes, you should be able to follow the guidelines spelled out in http://www.ti.com/lit/spraas1 . Many papers and PhD thesis discuss the topic of layout and performance and there are many more blogs and articles online to read. At the end of the day, it is a trade-off between performance, cost, and complexity. The customer will need to balance the three to fit their application needs.

    Regards,
    Mark

  • Hi Wayne,

    For best possible performance you'd ideally separate VSSA and VSS planes. However, this can be expensive (additional layers) and has some pitfalls where separating the grounds could actually make things worse, not better.

    For transient signals, the ground return path goes directly under or over the trace in the nearest plane that that signal is referenced to (see the diagrams here: electronics.stackexchange.com/.../real-current-return-path). The 'loop area' of this signal, which is where the signal E+M fields exist and thus the signal energy exists is in that area between the trace and it's ground-return. If the signal is running directly adjacent to the appropriate ground plane, the loop area will be small. However, if the signal crosses a cut in the planes, the signal will have to find some circuitous way around. This results in a large signal loop-area, so the energy occupies a large space which is very likely to overlap with the signal energy of other signals on the board. Crosstalk thus occurs between signals if your signals cross a separated ground plane (or run adjacent to the wrong ground plane).

    As noted above, since most of the signal energy is near the signal trace (not in the whole plane) you can prevent coupling between analog and digital signals by just physically separating the signals from each other. One easy method is to separate the planes, route the signals, and then remove the separation between planes. This is usually good enough.

    Overall it is very difficult for us to provide definitive guidance on this topic (and other board layout topics) because the trade-offs between board size vs board cost vs board complexity vs performance vs other application requirements have to take into account all the ICs and components on the board, not just C2000.

    (But we are trying to get more HW design type collateral for customers, either directly in the datasheets or potentially in a HW design guide type document)
  • Devin, Mark,

    Thank you for your information.

    Wayne