This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

F28M36P63C2: F28M36P63C2

Part Number: F28M36P63C2

Hello,

Thank you for sharing the TINA simulation it really helped but it seems that I have another problem with my analog acquisitions.

It is working for all the channels of my ADC except for the last one or two inputs, the voltage at the input of the ADC drops and my acquisitions are wrong.

Is it possible that puting a Cext of 2.2uF at each input impacts the last ADC acquisitions (exemple: ADCxINB6 and ADCxINB7)?

Thank you in advance.

Thomas

  • Thomas,

    Are you able to see the voltage drop on the ADC pin during sampling with an oscilloscope?

    The ADC channels are generally resistant to cross-influence except for the following scenarios:

    • S/H charge residue on Ch carries over between SOCs, so the SOCn conversion value will determine the starting voltage on Ch when SOCn+1 begins. This effect is mitigated by matching the ACQPS window with the input signal conditioning so that Ch has enough time to settle within the ACQPS window.
    • If an input voltage outside of VSSA-VDDA is driven onto a channel, it may affect the ADC operation in unpredictable ways
    • When a channel is sampling, its complementary simultaneous pair sample capacitor will also sample at the same time. This applies to both sequential and simultaneous sampling modes.

    I would not expect the capacitor values from one channel to affect another.

    -Tommy

  • Thomas,

    It has been a while since your last update. I assume that you were able to resolve your issue.

    If not, please reply to this thread. If the thread has locked due to timeout, please create a new thread describing the current status of your issue.

    -Tommy
  • Hello tommy,

    Sorry we didn't have the time to investigate but thanksfully to your response we can now orientate our investigation on the first and third point which may cause some problems with our architecture.

    I'll keep you inform on the results.

    Thank you.

    Thomas