TMS320F28379D: Dual core control scheme with ADC and CLA and EPWM

Pierre Bouchet1

Expert 2545 points

Part Number: TMS320F28379D

Hello everyone,

I want to use both cores to control different stages of a converter and I'm wondering a few things:

I remember reading something about ADC result registers having mirrors in both cores. Can someone confirm that both cores have independent access to the ADC Result Regs? Is there any risk of delay if both cores try to read them at the same time, like a round-robin scheme or such?
I found a few topics stating that CPU2 cannot be used to clock or configure the HRPWM modules. Is it possible nonetheless to configure EPWM + HRPWM on CPU1 and then have CPU2.CLA1 update CMPA/CMPAHR?

The initialization of the F28379D would go like so:

For the realtime control architecture I would like to achieve what is described in the following diagram.

Is it possible and if not what is the recommended way to do something similar? I thought about only performing calculations in CPU2.CLA1 and passing back to CPU1 the values to write to the EPWM, but I'd rather avoid the overhead.

Cheers,

Pierre

over 5 years ago

0 Nima Eskandari over 5 years ago

TI__Guru 51940 points

As far as the PWM questions, No the HRPWM cannot be used on CPU 2. The ePWM module using HRPWM needs to be assigned to a core and in this case it will be assigned to CPU1. Use IPC or some other source of communication to send new CMPHR values to CPU1 to update them.

Devin Cottier Can you comment on the ADC?

0 Vivek Singh over 5 years ago in reply to Nima Eskandari

TI__Guru** 109165 points

Hi,

On ADC query -

I remember reading something about ADC result registers having mirrors in both cores. Can someone confirm that both cores have independent access to the ADC Result Regs? Is there any risk of delay if both cores try to read them at the same time, like a round-robin scheme or such?

Yes, ADC results can be accessed by both CPU without any delay.

Regards,

Vivek Singh

0 Pierre Bouchet1 over 5 years ago in reply to Vivek Singh

Expert 2545 points

Is it possible to achieve what I described in my digram, with one ADC interrupt triggering a task on CPU1.CLA1 and another interrupt on the same ADC triggering a task on CPU2.CLA1?

If not then how can I trigger CLA tasks on both cores in a synchronized manner?

Regards,
Pierre

0 Pierre Bouchet1 over 5 years ago in reply to Pierre Bouchet1

Expert 2545 points

In the TRM, chapter 2.4.2.4 Dual-CPU Interrupt Handlingstates that "a peripheral owned by one CPU can cause an interrupt on the other CPU if that interrupt is enabled in the other CPU's PIE".

Since the CLA task triggers bypass the PIE, how do they work with regard to dual-core operation?

0 Nima Eskandari over 5 years ago in reply to Pierre Bouchet1

TI__Guru 51940 points

I believe you would be able to achieve what you are looking for however I have never tried it. Try Setting up both CLAs to use the same interrupt source (say EPWM1 INT) and double check this. Or use the ADC interrupt to trigger both CLAs. I believe this is possible. Let me know if you have trouble testing this.

0 Pierre Bouchet1 over 5 years ago in reply to Nima Eskandari

Expert 2545 points

Hi Nima,

No problem using a single ADC interrupt to trigger tasks on both CLAs.

Regards,
Pierre

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TMS320F28379D: Dual core control scheme with ADC and CLA and EPWM