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TMS320F28379D: F28379D ADC sampling bit rate & signal conversion feature

Part Number: TMS320F28379D


Hi,

i've been browsing through the ADC characteristics has been declared on TMS320F28379D datasheet whereby single-ended conversion support was only available for 12-bit mode only. Both datasheet Table 3-1 & Section 5.10.1 has it written on it. Hence i would like to check if i need a 16-bit single ended conversion is it possible to realize using this chipset? Else may i know what are the options which i can look at which offers 4x independent ADC within single chip which is capable of 16-bit single ended signal conversion? Please advise. Thanks.


Regards,

Leo

  • Hi Leo,

    Your reading of the datasheets are correct; 16-bit + single-ended conversion mode is not specified for F2837x devices.  

    You may need to use a discrete ADC if you want 4x 16B SE conversions.  

    Can you help me understand the hesitation on using 16-bit differential inputs?  

  • Hi Devin,
    My customer is having single ended input signals sources inbound to the MCU hence initial ideas was expecting 16-bit single ended digital output as well. I've highlighted the pros & cons of converting the single ended input-feed to differential output-feed prior to C2000 onboard ADC analog input. And if i read correctly, eventually i'll need to setup amplifier designs on the input front-end correct?

    In my use case the converted digital output from ADC will be sent directly to a FPGA for further processing; assuming I'm having 16-bit differential signal sending into FPGA. I would not have to take the extra step of converting these signals back to single ended output correct?

    Regards,
    Leo
  • Hi Leo,

    Yes, if you want to use 16-bit ADC resolution you'd need too use an op-amp circuit to convert the single-ended signals to differential before input the signal into the ADC pins.  You can do this at the source of the signal vs right at the ADC input to get some noise immunity as you route across the PCB (a differential input will reject common mode noise).  There are SE to DE op-amp topologies that use either two single-ended op-amps or a single fully differential op-amp.  If you need help with these circuits, the best place to go is the precision op-amp section of the e2e (by using an op-amp part # in your thread creation dialog).  

    As far as the FPGA, you shouldn't really need to do anything different with the converted digital ADC values; these are still an unsigned int between 0 and 65535 that indicate the voltage level just like a single-ended 16-bit ADC input would be.