Dear Sir ,
- We have prototype board that we recently got and we are doing bring up testing , the board include TMSF28376SZ
- The DSP (TMSF28376SZ) is interfacing FGPA Chip via EMIF1 (as Async RAM 16 bit)
- We already tested the connection between the DSP and FPGA and software by using evaluation boards (including the EMIF)
- The Issue (still under investigation ) is that the EMIF is using GPIO-72 which affect the boot mode of the DSP (GPIO-84 is not in used but have pull-up to 3.3V)
- If we take a board(prototype) without programming the FPGA (hence GPIO-72 is not affected by the FPGA and have pullup to 3.3V) the DSP load up normally
- If we take a board (prototype) with FPGA already programed (thus the interface EMIF is enabled and may affect GPIO-72) the DSP wont load up normally
i. In this scenario I connected JTAG (USB2000 Blackhwak) to the target (only symbols loading without programming)
ii. In this scenario I connected JTAG (USB2000 Blackhwak) to the target (only symbols loading without programming)
iii. In CCS set EMU Boot mode -> EMU_BOOT_FLASH
iv. In CCS Reset the CPU , and click Resume the DSP Load normally
v. The Only different is that the boot mode is override by EMU_BOOT_FLASH
- from all the above we conclude that GPIO0-72 may be affected by the FPGA during power up , and thus cause the DSP to Enter some boot mode (such as SCI or parallel GPIO)
- in order to solve this the only solution visible solution I can see is FLASH Z1-BOOTCTRL (set KEY =0x5A and BMODE=0x0B ) - hence force boot to FLASH
- is this the correct solution ?
- are there alternative solution ?
- can you please instruct how to FLASH Z1-BOOTCTRL ( I saw some example blinkey_with_dcsm_cpu that has the option to FLASH user OTP)
- will this affect Debugging ? (e.g. after FLASH Z1-BOOTCTRL )
