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Original question:

CCS/TM4C129XNCZAD: QSSI synchronization

CCS/TMS320F28388D: Need to read two serial devices (SSI) simultaneously.

Bob Snyder1
Intellectual 370 points
Part Number: TMS320F28388D


Tool/software: Code Composer Studio

I have two identical rotary encoders which have an SSI interface (22 bit).  I need to read both devices simultaneously (preferably sharing a common clock).  The hardware in question has only one SSI 'port' and it's buffer is only 16 bit.   Any suggestions?  Should I be considering the FSI?

  • 0
    TI__Mastermind 32655 points

    Hi,

    For interfacing 2 slaves, you can connect GPIOs to the CS pins of the slave modules and control the GPIO pins via software.

    The maximum size of the data that can be transferred is 16. This is true for the SPI module in the C28x subsystem as well.

    Regards,

    Veena

  • 0 in reply to Veena Kamath
    Intellectual 370 points

    Veena,

    I can certainly use GPIO and 'code' my way to a solution.  With my slave(s) sending a block of 22bits this is causing a problem for me as well.  All of the serial peripherals want multiples of 8 of course.  I have an added complication in that the slaves(s) don't follow any protocol that I can identify.  There is no 'frame sync' or 'CS'.  The devices uses 'gaps' in the clock sequence to begin a new sample period.  In other words, you have to clock the devices at 500k-1MHz to pull the serial data out (22 bits worth) and then stop the clock for 25us.  Upon resuming the clock, a new 22 bit stream of data will be available. 

    Bob 

  • 0 in reply to Bob Snyder1
    TI__Guru 57255 points

    Hi Bob,

    The following thread may be helpful (SPI method):
    https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/539796?TMS320F28379D-SSI-encoder-interface

    To connect up to a second slave you could theoretically utilize a second SPI, this time as a slave.  The clock from the master SPI instance would go to all encoders and the slave SPI instance.  Note that this would work only if the cabling length are short, where compensation for the delay due to cabling would not be necessary.

    Note that the SPI has a FIFO built into it.  If configured correctly, and you write two 11bit 'words', the 22 bits will output consecutively.

    Hopefully this helps some.


    Thank you,
    Brett

  • 0 in reply to Brett Larimore
    Intellectual 370 points

    Brett,

    I believe this may work.  I should be able to read 24 bit 'words' with both SPI instances and then strip off the extra bits.  I don't see any way to limit this to just the 22 bits that I need.

    Thank you,

    Bob