Dear team:
I simulated 28377D MCBSP as SPI to communicate with CPLD, set up DSP as host and CPLD as slave (only one slave).
I checked that the chip selection, CLK and transmission signal are normal, and the data sent by CPLD to the DSP can also be seen through the oscilloscope. But in the CCS on-line simulation, we observed that DRR1 always displayed 0xFF. What could cause this?
Best regards