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State of F2812 GPIO pins during reset

Other Parts Discussed in Thread: TMS320F2812

I am designing a board that will use the TMS320F2812 to
control a power supply. It it critical to prevent pins
attached to power devices from glitching, especially during
power up.

With other micros, I had merely to find what state the
digital outputs assume while the RESET input is true, and
make that state 'OFF'. For the F2812 I can find little info
on this, but section 6.9 of the _Data_Manual_ (SPRS174Q)
contains the language:
    "The GPIO pins are undefined until Vdd = 1 V and
     Vddio = 2.5 V."

"Undefined" is not "defined" anywhere, but I interpret this
to mean:
- They might be inputs, (and tri-stated),
- They might be outputs, and high,
- They might be outputs, and low, or
- They might play the entire second movement of Beethoven's
  9th Symphony at a frequency only dogs can appreciate.

Thus, if I want to protect my output devices from damage, I
must install a hardware-controlled gate layer between the
micro and its application circuit to prevent power-up
glitches. (This is a major disappointment, as the F2812
costs 3x as much as the 8-bit micro that doesn't need such
countermeasures.)

Am I missing anything?
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Gary Lynch        printf("lynchg%cstacoenergy%ccom", 64, 46)
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  • If my memory serves me okay then what you said is correct.. the pins are not defined during that short period while the power rails are coming up. I am sure TI team will post the correction if that is not the true situation.

    By the way, I believe the newer 280xxx family of devices have taken care of this concern.