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TMS320F28075: Getting external interrupt.

Alex Lifshitz
Intellectual 560 points

Part Number: TMS320F28075
Other Parts Discussed in Thread: SYSBIOS

Hi,

I have an external interrupt on GPIO2.

The ISR function defined in SYS/BIOS as illustrated in the attached screenshot.

Upon init, I configure it in the following way, but I don't reach the ISR function. 

On the oscilloscope I see the 1ms wide signal coming every 100ms.

Please advise what could wrong. Did I missed something?

Thanks for your help,

Alex.

    EALLOW;
    GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 0;        // GPIO2
    GpioCtrlRegs.GPADIR.bit.GPIO2 = 0;         //  explicitly input
    GpioCtrlRegs.GPAQSEL1.bit.GPIO2 = 0;       // // XINT1 Synch to SYSCL
    EDIS;

    EALLOW;
    InputXbarRegs.INPUT4SELECT = 2;         // XINT1 is GPIO2
    EDIS;

    XintRegs.XINT1CR.bit.POLARITY = 1;      // Interrupt is selected as positive edge triggered.
    XintRegs.XINT1CR.bit.ENABLE = 1;        // Enable XINT1

  • 0
    TI__Guru 54515 points

    I'm not seeing anything wrong with your code. Can you confirm in the registers view that all the interrupts is enabled appropriately (IER.INT1 set, PIEIER1.INTx4 set)? If you manually set PIEIFR1 in the registers view, does your ISR get triggered?

    How are you testing the ISR? By putting a breakpoint in it?

    Whitney

  • 0 in reply to Whitney Dewey
    Intellectual 560 points

    All the registers looks ok, but I still don't reach the ISR (yes, I'm setting a breakpoint inside it):

  • 0 in reply to Alex Lifshitz
    TI__Guru 54515 points

    In those screenshots you shared, is PIEIFR1.INTx4 set because you manually set it (like the experiment I asked about in my previous post) or is it set from just running the code and likely detecting the edge on GPIO2.

    If it's set from just running the code, see if clearing PIEACK.ACK1 is enough to get the interrupts going.

    If it's because you manually set it, please check IER.INT1 and ST1.INTM under the Core Registers as well. Also check ROV to see if SYSBIOS has detected an errors, and make sure the Hwi instance is showing up as expected in the Hwi section.

    Whitney

  • 0 in reply to Whitney Dewey
    Intellectual 560 points

    It is set just from running the code.

    Clearing the ACK1 gives nothing - in 100ms I get another pulse that setting this bit back.

    As you can see from the screenshots, I have 2 external interrupts from different GPIOs (GPIO2 and GPIO78) XINT1 and XINT2. Both of them defined in the same way. May it somehow make troubles?

    Alex.

  • 0 in reply to Alex Lifshitz
    Intellectual 560 points

    In ROV I see no errors.

    In Hwi section I see the below:

    The IRP shows I've never entered the ISR. 

    Is the DisableMask and the RestoreMask should be the same for both the external interrupts?

    Alex.

  • 0 in reply to Alex Lifshitz
    TI__Guru 54515 points

    Thanks for the additional info. It's good to confirm that the edge is being detected and the the PIE registers seem to be behaving correctly at least.

    Those masks default to the IER group that the interrupt is in. Since XINT1 and XINT2 are in the same group, it makes sense that the mask is the same. That's not a problem.

    Did you check IER.INT1 and ST1.INTM? INTM is probably fine since your CAN ISR and the clock tick seem to be working, but I want to be sure of Core Register IER.INT1 at least.

    Whitney

  • 0 in reply to Whitney Dewey
    Intellectual 560 points

    Solved!

    Indeed the IER wasn't enabled...

    Thanks you so much.

    Shame on me...:)