CCS/TMS320F28377D: PWM sync operation

Hi,

The EPWM sync scheme device in this device allows maximum 4 EPWM modules in the sync chain. Refer to "Time-Base Counter Synchronization Scheme" in device TRM for more details. 

Since you mention that phase delay needed is zero  you can use "Time-Base Clock Synchronization" to synchroniza all the enable ePWM modules to the TBCLK. For perfectly synchronized TBCLKs, the prescalers for each ePWM module must be set identically.

The proper procedure for enabling ePWM clocks is as follows:
1. Enable ePWM module clocks in the PCLKCRx register
2. Set TBCLKSYNC= 0
3. Configure ePWM modules
4. Set TBCLKSYNC=1

Thanks

Vasudha

Hi vasudha, 

Thanks for reply.

"Maximum 3 EPWMs" ?! Really? Are you sure about this?

So why a master PWM (PWM1) and 5 slaves (2,3,4,5 and 6) are shown on page 1532 of TRM as is shown in attached photo?!

Besides, many PWMs are synced togheterh in one of the code examples of TI : "IDDK_PM_Servo_F2837x.C"

	PWM_1ch_UpDwnCnt_CNF(6,RESOLVER_PWM_TICKS,160);

	// ********************************************************************
	//PWM 11 for syncing up the SD filter windows with motor control PWMs
	// ********************************************************************
	PWM_1ch_UpCnt_CNF(11,INV_PWM_TICKS);

	// configure 2 and 3 as slaves
	EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
	EPwm2Regs.TBCTL.bit.PHSEN    = TB_ENABLE;
	EPwm2Regs.TBPHS.bit.TBPHS    = 2;
	EPwm2Regs.TBCTL.bit.PHSDIR   = TB_UP;

	EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
	EPwm3Regs.TBCTL.bit.PHSEN    = TB_ENABLE;
	EPwm3Regs.TBPHS.bit.TBPHS    = 2;
	EPwm3Regs.TBCTL.bit.PHSDIR   = TB_UP;

	SyncSocRegs.SYNCSELECT.bit.EPWM4SYNCIN = 0; 	 //EPwm1SyncOut

	EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
	EPwm5Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

	EPwm6Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;
	EPwm6Regs.TBCTL.bit.PHSEN    = TB_ENABLE;
	EPwm6Regs.TBPHS.bit.TBPHS    = 2;
	EPwm6Regs.TBCTL.bit.PHSDIR   = TB_UP;

	SyncSocRegs.SYNCSELECT.bit.EPWM10SYNCIN = 0;  //EPwm1Sync Out
	EPwm10Regs.TBCTL.bit.SYNCOSEL        = TB_SYNC_IN;

	EPwm11Regs.TBCTL.bit.PHSEN  = TB_ENABLE;
	EPwm11Regs.TBPHS.bit.TBPHS  = 2;
	EPwm11Regs.TBCTL.bit.PHSDIR = TB_UP;

Hi,

lio messi said:

"Maximum 3 EPWMs" ?! Really? Are you sure about this?

Actually it is 4 EPWMs if EPWM1 is master. PFB the sync scheme mentioned in TRM. I have corrected this in above reply as well.

Yes it is possible to make EPWM1 as master of multiple PWMs but still the sync chain showed in above inverter stage is not correct. EPWM4 syncin can either be EPWM1 syncout or external sync input.

Also as mentioned in the above code snippet from motor solution in order to make all the pwms syncronized to EPWM1, syncin for different PWMs should be configured correctly as per the sync scheme mentioned above. The TBPHS value should be configured as per TBCLK configuration. Refer to below description from TRM for TBPHS specific calculation.

Each ePWM module can be configured to use or ignore the synchronization input. If the TBCTL[PHSEN]
bit is set, then the time-base counter (TBCTR) of the ePWM module will be automatically loaded with the
phase register (TBPHS) contents when one of the following conditions occur:
. EPWMxSYNCI: Synchronization Input Pulse:
The value of the phase register is loaded into the counter register when an input synchronization pulse
is detected (TBPHS ¨ TBCTR). This operation occurs on the next valid time-base clock (TBCLK)
edge.
The delay from internal master module to slave modules is given by:
. if ( TBCLK = EPWMCLK): 2 x EPWMCLK
. if ( TBCLK != EPWMCLK):1 TBCLK

Hi Vasudha, 

I'm a little confused. 

- If I want to set PWM1 as the master, how many PWMs can I set as the slaves for that? In the code I have presented in my previous reply from "IDDK_PM_Servo_F2837x.C", PWM 2, 3, 6 ,and 11 have been set as the slaves of PWM1. Is it true? it means 4 slaves. You are saying that it cannot be 5 slaves? (e.g. setting another PWM as a new slave?)

- Regarding my main question in the first post, what are the correct values for those register I have mentioned? (the question is re-mentioned below)

 I wan PWM1, PWM2, PWM3, and PWM11 be in phase together (synchronous operation with zero phase delay). What should I set for:

EPwm1Regs.TBCTL.bit.SYNCOSEL

and 

EPwm2Regs.TBPHS.bit.TBPHS,

EPwm3Regs.TBPHS.bit.TBPHS,

EPwm10Regs.TBCTL.bit.SYNCOSEL

EPwm11Regs.TBPHS.bit.TBPHS

Considering 2 cycle logic delay between master and slaves, should I set TBPHS as follows?

EPwm2Regs.TBPHS.bit.TBPHS=2;

EPwm3Regs.TBPHS.bit.TBPHS=4;

EPwm11Regs.TBPHS.bit.TBPHS=4;

Regards.

Hi Vasudha,

Thanks for the reply. It's now crystal clear.

Best regards.