This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/TMS320F28377D: emif

Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

I would like to use 28377D to communicate with FPGA through EMIF (8 address lines, 16 data lines). The communication part in FPGA is controlled by the CS2 signal, EM1RNW, and EM1WE from 28377D. The 28377D is configured EMIF1 in 16bit ASYNC mode. I followed the Technical Reference Manual, EM1BA[1]--A[0], EM1A[7:1]--A[7:1]. And I have configured the GPIOMUX of these pins. However, when I try to read/write address 0x0010 0000 to 0x0010 0008, the CS2 signal still kept high level. Signaltap 2 indicated the wrong address on the address line. (Program in FPGA is used 'case' sentence, to put data on the data bus when received corresponding address information through address bus.)

        InitSysCtrl();

	EALLOW;
	ClkCfgRegs.PERCLKDIVSEL.bit.EMIF1CLKDIV = 1; // PLLSYSCLK 1/2 for EMIF
	EDIS;

	InitGpio();

	EALLOW;
	//led
	GpioCtrlRegs.GPEMUX1.bit.GPIO133=0;
	GpioCtrlRegs.GPEDIR.bit.GPIO133=1;

	//cs2 rd we
	GpioCtrlRegs.GPBMUX1.bit.GPIO34=2; //cs2	LOW ENABLE
	GpioCtrlRegs.GPBMUX1.bit.GPIO33=2; //RNW	HIGH ENABLE
	GpioCtrlRegs.GPAMUX2.bit.GPIO31=2; //WE		LOW ENABLE
	GpioCtrlRegs.GPBMUX1.bit.GPIO37=2; //EM1OE      LOW ENABLE

	//addr
	GpioCtrlRegs.GPBMUX1.bit.GPIO38=2;
	GpioCtrlRegs.GPBMUX1.bit.GPIO39=2;
	GpioCtrlRegs.GPBMUX1.bit.GPIO40=2;
	GpioCtrlRegs.GPBMUX1.bit.GPIO41=2;

	GpioCtrlRegs.GPBMUX1.bit.GPIO44=2;
	GpioCtrlRegs.GPBMUX1.bit.GPIO45=2;
	GpioCtrlRegs.GPBMUX1.bit.GPIO46=2;
	GpioCtrlRegs.GPBMUX1.bit.GPIO47=2;

	//data
	GpioCtrlRegs.GPCMUX1.bit.GPIO69=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO70=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO71=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO72=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO73=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO74=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO75=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO76=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO77=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO78=2;
	GpioCtrlRegs.GPCMUX1.bit.GPIO79=2;
	EDIS;
        Emif1Regs.ASYNC_CS2_CR.all = (EMIF_ASYNC_ASIZE_16    | 	
				      EMIF_ASYNC_TA_1        |	
				      EMIF_ASYNC_RHOLD_8     |	
				      EMIF_ASYNC_RSTROBE_64  |	
				      EMIF_ASYNC_RSETUP_16   |	
				      EMIF_ASYNC_WHOLD_8     |	
				      EMIF_ASYNC_WSTROBE_64  |	
				      EMIF_ASYNC_WSETUP_16   |	
				      EMIF_ASYNC_EW_DISABLE  |	
				      EMIF_ASYNC_SS_DISABLE);	

	DINT;
	InitPieCtrl();
	IER = 0x0000;
	IFR = 0x0000;
	InitPieVectTable();
	EINT;

#define ExRamStart (Uint16*)0x00100000;
	for(i=0; i<0x0008; i++)
	{
	     a = *(ExRamStart+i);
	}

Please help me and give me a hint on how to solve this problem.

Thank you!

  • Hi,

    Your code looks ok to me but can you try the ASYNC EMIF example available in C2000Ware (device_support\f2838x\examples\cpu1\emif) and see if that works fine.

    Regards,

    Vivek Singh

  • Hi Vivek:

    Thanks for your reply. I found a mistake in my code, the configuration of A0 is not correct. Then I modified that. However, it still not work.

    I have tried the sample code in C2000ware. However, it didn't work. I used an oscilloscope to check the cs2 signal. CS2 still kept at a high level. RNW is low, WE is high, emif_clk is high.

    In my mind, the CLK for EMIF has been configured, which means the EMIF part is enabled. Then, CS is high, which means the address hasn't been accessed. Could you give me some suggestions to do further check?

    My hardware is TI control card R1.1 with docking station R4.1. 

    Many Thanks

    Husky

  • There is another post where we are discussing this issue hence marking this closed.

    Regards

    Vivek Singh