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TMS320F28377D: CPU2 watchdog overflow

Etiam
Intellectual 730 points
Part Number: TMS320F28377D


Hello

for my application I would like that a watchdog overflow of cpu2 causes a cpu1 reset (also resulting in a cpu2 reset). For the moment I've tried (with no success) to do this:

- In CPU2 configure watchdog to cause a reset

- In CPU1 enable NMI interrupt in PIE vector table

- In CPU1 Iinside NMI ISR clear NMI flag then force its own watchdog reset with a for (;;) bucle

The problem I'm facing is that CPU1 resets but CPU2 doesn't.

By the way, is there some example of using NMI interrupts? Which could be the best solution for my problem?

Thank you

Maite

  • 0
    TI__Guru** 115881 points

    Etiam,

    Couple of things to check.

    1. Make sure CPU1 watchdog is not triggering the reset even before entering the NMI handler. For that please make sure you disable the WD in your application just after entering the main() function and enable it inside NMI handler.
    2. Make sure inside CPU1 NMI handler, you only enable the WD and issue reset if NMI was caused by CPU2 WD reset. For other NMI, just clear the flag and exit the handler.

    BTW, how do you know CPU2 is not getting reset? If CPU1 WD trigger reset, it'll reset CPU1 and well as CPU2. Are you checking RESC register in CPU2 to know the reset status?

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    TI__Guru** 115881 points

    Are you still having this issue? If not, please mark it resolved.

    Regards,

    Vivek Singh