TMDSDOCK28M36: Issue uploading F28M36X example code

Paul Lane

Part Number: TMDSDOCK28M36
Other Parts Discussed in Thread: UNIFLASH, CONTROLSUITE, F28M36P63C2

Hello,

Having an issue uploading example software to the TMDSDOCK28M36 for the first time.

Using Code Composer and default board settings I was able to verify the internal s100v2 connection in the property window. When clicking the debug button to upload the project, I get stuck on the GEL expression - OnTargetConnect() and eventually cancel because too much time has passed.

According to the Errata of the R1.1 Version 1.3 May 2016 of the TMS320F28M36 Concerto controlCARD R1.1 Information Guide document

It can be difficult to connect to the MCU via JTAG when using the Boot-to-Flash boot
mode if no code is already loaded into the device. It is recommended to use Boot-from-
Ethernet boot mode (or other boot mode) until valid code is loaded into FLASH.

With this information I have tried to switch board settings and use the UNIFLASH application to upload to the board.

The SW1 is set to serial peripherals 0010 before powered up

A:SW1 position 2 need to set to ON to enable internal FTDI USB to serial

A:J1 USB connection is made to the computer. (no additional USBs or power connected)

UNIFLASH detects the internal s100v2 but fails to upload

Texas Instruments XDS100v2 USB Debug Probe/IcePick_C_0

Error connecting to the target: (Error -2131 @ 0x0) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 8.4.0.00006)

Changing the A:SW1 position 1 to off so it disables the s100v2 and starting the process over using UNIFLASH failed again.

I would ultimately like to successfully run the F28M36x example for lwip located here in control suite here:

C:\ti\controlSUITE\device_support\f28m36x\v220\F28M36x_examples_Master\enet_lwip\m3\ccs

over 4 years ago

0 Cody Watkins over 4 years ago

TI__Mastermind 41385 points

Paul,

Dumb question, but did you power the controlCARD? Please provide a picture of your setup in the running configuration.

If you cannot provide a photo, please describe the cabling that you have connected to the control card and the reliant switch positions to provide power.

Regards,
Cody

0 Paul Lane over 4 years ago in reply to Cody Watkins

Prodigy 210 points

There are 2 USB ports on the card itself, and another USB port on the base.

On Card:

J9 Micro USB
A:J1 Mini-B USB

On Base:

J17 Mini-B USB

There are also several switches on the board that have been detailed above.

I have tested with several combinations of the USB cables plugged in as well. Each time the s100v2 is detected and verified in ccs, or uniflash. What options are there for power? as I have tried J17, and J9 at the same time, and separately. Do I need dedicated power using J1? or is one of the USB connections sufficient?

Please suggest a known working setup to load code over usb, and I will test that setup, I have few preferences and would like the lwip example above to work.

0 Cody Watkins over 4 years ago in reply to Paul Lane

TI__Mastermind 41385 points

Paul,

the preferred way to power the C2000 device is using J1 or J17 of the docking station. Please note that S1 of the docking station must be put in the correct position to work. You should see D3 and D5 illuminate on the controlCARD. Verify the voltage at TP7 and TP8

A:J1 is required to power the emulator(XDS100v2). You should see A:D2 illuminate on the controlCARD. Verify the voltage at A:TP1.

You do not need to connect J9 in a parallel.

Working examples can be found in controlSUITE. FYI you do not need a build .out file to connect to a device.

There is no need to use UNIFLASH here, it will work, but should function identically to CCS for this purpose.

Your setting of SW1 looks fine.

A:SW1 position 1 needs to be "on" to use the embedded emulator. A:SW1 position 2 will not have an affect like you are seeing here.

Additionally please check the status of XRSn(TP2).

Have you ever used this board before?

Once you get the status of those Test points lets go from there.

Regards,
Cody

0 Paul Lane over 4 years ago in reply to Cody Watkins

Prodigy 210 points

Base board:

J17 connected

S1 = USB-ON

D1 = Green LED ON

Card:
A:J1 connected

A:D2 Green LED ON

A:TP1 = 3.26v

A:SW1.1 = 1

XRSn(TP2) = 3.29v

D3 = Green LED ON

D5 = Not populated along with U4 and other RC components in the area.

D2 = Red LED ON (Controlled by GPIO-34 with negative logic (red))

TP7 = 3.3v

TP8 = 3.3v

SW = 0010 from the perspective of Boot being on top

withing CCS in project properties I click verify to test to connection, and fail with this message.

[Start]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\Users\plane\AppData\Local\TEXASI~1\CCS\
    ccs930\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioxds110.dll'.
The library build date was 'Nov 25 2019'.
The library build time was '16:55:29'.
The library package version is '8.4.0.00006'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.

An error occurred while hard opening the controller.

-----[An error has occurred and this utility has aborted]--------------------

This error is generated by TI's USCIF driver or utilities.

The value is '-260' (0xfffffefc).
The title is 'SC_ERR_XDS110_OPEN'.

The explanation is:
An attempt to connect to the XDS110 failed.
The cause may be one or more of: no XDS110 is connected, invalid
firmware update, invalid XDS110 serial number, or faulty USB
cable. The firmware and serial number may be updated using the
xdsdfu utility found in the .../ccs_base/common/uscif/xds110
directory of your installation. View the ReadMe.txt file there
for instructions.

[End]

First time using this board, trying to benchmark the board/toolchain and the lwip example

Edit:

Testing with SW to 1100 (boot towards the top of the switch as 1234 or upside down on the top of the switch so the correct pin position is confusing) (Ethernet)

The red LED on D2 in now off. and I am able to successfully verify the connection.

[Start]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

[Result]

-----[Print the board config pathname(s)]------------------------------------

C:\Users\plane\AppData\Local\TEXASI~1\CCS\
ccs930\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusb.dll'.
The library build date was 'Nov 25 2019'.
The library build time was '16:55:29'.
The library package version is '8.4.0.00006'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

-----[The log-file for the JTAG TCLK output generated from the PLL]----------

There is no hardware for programming the JTAG TCLK frequency.

-----[Measure the source and frequency of the final JTAG TCLKR input]--------

There is no hardware for measuring the JTAG TCLK frequency.

-----[Perform the standard path-length test on the JTAG IR and DR]-----------

This path-length test uses blocks of 64 32-bit words.

The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 6 bits.

The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

The JTAG DR Integrity scan-test has succeeded.

[End]

failed on attempt to upload and noticed the examples are all set to use F28M35H52C1, in the F28M36x/v220 folder. and on attempt to switch the to F28M36P63C2 the example fails to build with the errors below.

**** Clean-only build of configuration Flash for project uart_echo_m3 ****

"C:\\ti\\ccs930\\ccs\\utils\\bin\\gmake" -k clean 
 
DEL /F  "uart_echo_m3.hex"  "uart_echo_m3.out" 
DEL /F "startup_ccs.obj" "uart_echo.obj" 
DEL /F "startup_ccs.d" "uart_echo.d" 
Finished clean
 

**** Build Finished ****

**** Build of configuration Flash for project uart_echo_m3 ****

"C:\\ti\\ccs930\\ccs\\utils\\bin\\gmake" -k all 
 
Building file: "C:/ti/controlSUITE/device_support/f28m36x/v220/F28M36x_examples_Master/uart_echo/m3/startup_ccs.c"
Invoking: ARM Compiler
"C:/ti/ccs930/ccs/tools/compiler/ti-cgt-arm_18.12.4.LTS/bin/armcl" -mv7M3 --code_state=16 -me --include_path="C:/ti/ccs930/ccs/tools/compiler/ti-cgt-arm_18.12.4.LTS/include" --include_path="C:/ti/controlSUITE/device_support/f28m36x/v220/MWare" --define="_FLASH" --define=ccs -g --gcc --diag_suppress=10199 --diag_warning=225 --gen_func_subsections=on --abi=eabi --ual --preproc_with_compile --preproc_dependency="startup_ccs.d_raw"  "C:/ti/controlSUITE/device_support/f28m36x/v220/F28M36x_examples_Master/uart_echo/m3/startup_ccs.c"
Finished building: "C:/ti/controlSUITE/device_support/f28m36x/v220/F28M36x_examples_Master/uart_echo/m3/startup_ccs.c"
 
Building file: "C:/ti/controlSUITE/device_support/f28m36x/v220/F28M36x_examples_Master/uart_echo/m3/uart_echo.c"
Invoking: ARM Compiler
"C:/ti/ccs930/ccs/tools/compiler/ti-cgt-arm_18.12.4.LTS/bin/armcl" -mv7M3 --code_state=16 -me --include_path="C:/ti/ccs930/ccs/tools/compiler/ti-cgt-arm_18.12.4.LTS/include" --include_path="C:/ti/controlSUITE/device_support/f28m36x/v220/MWare" --define="_FLASH" --define=ccs -g --gcc --diag_suppress=10199 --diag_warning=225 --gen_func_subsections=on --abi=eabi --ual --preproc_with_compile --preproc_dependency="uart_echo.d_raw"  "C:/ti/controlSUITE/device_support/f28m36x/v220/F28M36x_examples_Master/uart_echo/m3/uart_echo.c"
Finished building: "C:/ti/controlSUITE/device_support/f28m36x/v220/F28M36x_examples_Master/uart_echo/m3/uart_echo.c"
 
Building target: "uart_echo_m3.out"
Invoking: ARM Linker
"C:/ti/ccs930/ccs/tools/compiler/ti-cgt-arm_18.12.4.LTS/bin/armcl" -mv7M3 --code_state=16 -me --define="_FLASH" --define=ccs -g --gcc --diag_suppress=10199 --diag_warning=225 --gen_func_subsections=on --abi=eabi --ual -z -m"uart_echo_m3.map" --heap_size=0 --stack_size=256 -i"C:/ti/ccs930/ccs/tools/compiler/ti-cgt-arm_18.12.4.LTS/lib" -i"C:/ti/ccs930/ccs/tools/compiler/ti-cgt-arm_18.12.4.LTS/include" --reread_libs --warn_sections --xml_link_info="uart_echo_m3_linkInfo.xml" --rom_model -o "uart_echo_m3.out" "./startup_ccs.obj" "./uart_echo.obj" "../F28M36x_generic_wshared_M3_RAM.cmd" "C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/driverlib/ccs/Debug/driverlib.lib"  -lrtsv7M3_T_le_eabi.lib -l"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd" 
<Linking>
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 47: error: 
   RESETISR memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 48: error: 
   INTVECS memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 59: error: 
   C0 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 59: error: 
   C0 memory range overlaps existing memory range C0
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 60: error: 
   C1 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 60: error: 
   C1 memory range overlaps existing memory range C1
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 61: error: 
   BOOT_RSVD memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 61: error: 
   BOOT_RSVD memory range overlaps existing memory range BOOT_RSVD
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 62: error: 
   C2 memory range overlaps existing memory range INTVECS
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 62: error: 
   C2 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 62: error: 
   C2 memory range overlaps existing memory range C2
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 63: error: 
   C3 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 63: error: 
   C3 memory range overlaps existing memory range C3
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 65: error: 
   C4 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 65: error: 
   C4 memory range overlaps existing memory range C4
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 66: error: 
   C5 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 66: error: 
   C5 memory range overlaps existing memory range C5
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 67: error: 
   C6 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 67: error: 
   C6 memory range overlaps existing memory range C6
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 68: error: 
   C7 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 68: error: 
   C7 memory range overlaps existing memory range C7
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 69: error: 
   C8 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 69: error: 
   C8 memory range overlaps existing memory range C8
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 70: error: 
   C9 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 70: error: 
   C9 memory range overlaps existing memory range C9
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 71: error: 
   C10 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 71: error: 
   C10 memory range overlaps existing memory range C10
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 72: error: 
   C11 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 72: error: 
   C11 memory range overlaps existing memory range C11
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 73: error: 
   C12 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 73: error: 
   C12 memory range overlaps existing memory range C12
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 74: error: 
   C13 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 74: error: 
   C13 memory range overlaps existing memory range C13
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 75: error: 
   C14 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 75: error: 
   C14 memory range overlaps existing memory range C14
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 76: error: 
   C15 memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 76: error: 
   C15 memory range overlaps existing memory range C15
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 78: error: 
   CTOMRAM memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 78: error: 
   CTOMRAM memory range overlaps existing memory range CTOMRAM
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 79: error: 
   MTOCRAM memory range has already been specified
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 79: error: 
   MTOCRAM memory range overlaps existing memory range MTOCRAM
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 160: warning: 
   absolute symbol "__STACK_TOP" being redefined
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 160: warning: 
   absolute symbol "__STACK_TOP" being redefined
warning: creating output section "ramfuncs" without a SECTIONS specification
"../F28M36x_generic_wshared_M3_RAM.cmd", line 71: error: program will not fit
   into available memory.  placement with alignment fails for section
   ".resetisr" size 0x6 .  Available memory ranges:
   RESETISR     size: 0x8          unused: 0x8          max hole: 0x8       
"C:/ti/controlSUITE/device_support/f28m36x/v220/MWare/cmd/F28M36x_generic_M3_FLASH.cmd", line 160: warning: 
   absolute symbol "__STACK_TOP" being redefined
error: errors encountered during linking; "uart_echo_m3.out" not built
 
>> Compilation failure
makefile:143: recipe for target 'uart_echo_m3.out' failed
gmake: *** [uart_echo_m3.out] Error 1
gmake: Target 'all' not remade because of errors.

**** Build Finished ****

The s110 error might have been my bad, as I was testing from the wrong project. after retesting I am able to repeatedly get the verify connection to pass as shown above. I was under the impression that SW! configuration and the red LED was an error, and tested both ethernet (1100) and the other setting mentioned. When I load code after getting the verify to be successful, I end up waiting the the GEL screen way too long, on canceling the gel screen I get this print out, and the debug window appears to be waiting for me to press play to run the program.?

Cortex_M3_0: GEL Output: Memory Map Initialization Complete
Cortex_M3_0: GEL: Error while executing OnTargetConnect(): Evaluation canceled
Cortex_M3_0: Flash Programmer: Warning: The configured device (F28M35H52C1), does not match the detected device (F28M36P63C2). Flash Programming operations could be affected. Please consider modifying your target configuration file.
Cortex_M3_0: Trouble Setting Breakpoint with the Action "Remain Halted" at 0x20004118: (Error -1066 @ 0x20004118) Unable to set/clear requested breakpoint. Verify that the breakpoint address is in valid memory. (Emulation package 8.4.0.00006) 
Cortex_M3_0: Breakpoint Manager: Retrying with a AET breakpoint
Cortex_M3_0: Breakpoint Manager: Error enabling this function: Address exceeds the allowed range
Cortex_M3_0: Error occurred during flash operation: Timed out waiting for target to halt while executing pwrite_en.alg
Cortex_M3_0: Flash operation timed out waiting for the algorithm to complete. Operation cancelled.
Cortex_M3_0: Perform a debugger reset and execute the Boot-ROM code (click on the RESUME button in CCS debug window) before erasing/loading the Flash.  If that does not help to perform a successful Flash erase/load, check the Reset cause (RESC) register, NMI shadow flag (NMISHDFLG) register and the Boot-ROM status register for further debug.

Pressing play now both D1 and D2 are on RED.

0 Cody Watkins over 4 years ago in reply to Paul Lane

TI__Mastermind 41385 points

Interesting, it seems like the HW is functioning normally.

Looking at the error its saying that you XDS110 doesn't have correct firmware. Can you share your Target configuration? This controlCARD does not have an XDS110, it has a XDS100V2, the target configurations are not compatible.

Please verify that your target config is correct.

Regards,
Cody

0 Paul Lane over 4 years ago in reply to Cody Watkins

Prodigy 210 points

Please refer to edited post, as I was trying additional things, and got your reply in the middle of editing.

0 Cody Watkins over 4 years ago in reply to Paul Lane

TI__Mastermind 41385 points

Paul,

it seems like your device selection is a little crossed. Are you using an F28m35 or an F28m36 device? Looking at the output it seems like you are using an F28M36, please make sure that you are using the correct device in your target configuration.

As for those build errors it look like there is a problem during linking, have you modified the linker command file? Its indicating that you have tried to define two memory ranges to the address.

For completeness I opened this project in CCS9 and it built without issue. Additionally because I suspect it could be due to a linker command error i have included the one I used to build it(This is the default linker command file included for F28M36 flash builds renamed to *.txt)

F28M36x_generic_M3_FLASH .txt

/*
//###########################################################################
// FILE:    F28M36x_generic_M3_FLASH.cmd
// TITLE:   Linker Command File for F28M36H63C2 examples that run from FLASH
//          Keep in mind that C0 and C1 are protected by the code
//          security module.
//          What this means is in most cases you will want to move to
//          another memory map file which has more memory defined.
//###########################################################################
// $TI Release: F28M36x Support Library v220 $
// $Release Date: Tue Sep 26 15:36:56 CDT 2017 $
// $Copyright: Copyright (C) 2012-2017 Texas Instruments Incorporated -
//             http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################
*/

--retain=g_pfnVectors

/* The following command line options are set as part of the CCS project.    */
/* If you are building using the command line, or for some reason want to    */
/* define them here, you can uncomment and modify these lines as needed.     */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone.              */
/*                                                                           */
/* --heap_size=0                                                             */
/* --stack_size=256                                                          */
/* --library=rtsv7M3_T_le_eabi.lib                                           */


/* The following options allow the user to program Z1 and Z2 DCSM security   */
/* values, include CSM PSWD, ECSL PSWD, GRABSECT, GRABRAM, and FLASH EXEONLY */
/* The driverlib/dcsm_z1_secvalues.s and driverlib/dcsm_z2_secvalues.s files */
/* must be included in the Flash project for the below 2 lines to take       */
/* effect.                                                                   */
--retain=dcsm_z1_secvalues.obj(.z1secvalues,.z1_csm_rsvd)
--retain=dcsm_z2_secvalues.obj(.z2secvalues,.z2_csm_rsvd)

/* System memory map */

MEMORY
{
    /* Flash Block 0, Sector 0 Z1 CSM */
    CSM_ECSL_Z1     : origin = 0x00200000, length = 0x0024
    CSM_RSVD_Z1     : origin = 0x00200024, length = 0x000C
    
    /* Flash Block 0, Sector 0 */
    RESETISR (RX)   : origin = 0x00200030, length = 0x0008   /* Reset ISR is mapped to boot to Flash location */
    INTVECS (RX)    : origin = 0x00201000, length = 0x0258
    FLASHLOAD (RX)  : origin = 0x00201258, length = 0x6DA8   /* For storing code in Flash to copy to RAM at runtime */
    
    /* Flash Block 0, Sector 1 to Flash Block 0, Sector 13 */
    FLASH (RX)      : origin = 0x00208000, length = 0xF7E00  /* Sector 1 thru Sector 13 (minus Z2 CSM) */
    
    /* Flash Block 0, Sector 13 Z2 CSM*/
    CSM_RSVD_Z2     : origin = 0x002FFE00, length = 0x01DC
    CSM_ECSL_Z2     : origin = 0x002FFFDC, length = 0x0024
    
    /* RAM */
    C0 (RWX)        : origin = 0x20000000, length = 0x2000
    C1 (RWX)        : origin = 0x20002000, length = 0x2000
    BOOT_RSVD (RX)  : origin = 0x20004000, length = 0x0FF8
    C2 (RWX)        : origin = 0x200051B0, length = 0x0E50
    C3 (RWX)        : origin = 0x20006000, length = 0x2000
    
    C4  (RWX)        : origin = 0x20018000, length = 0x2000
    C5  (RWX)        : origin = 0x2001A000, length = 0x2000
    C6  (RWX)        : origin = 0x2001C000, length = 0x2000
    C7  (RWX)        : origin = 0x2001E000, length = 0x2000
    C8  (RWX)        : origin = 0x20020000, length = 0x2000
    C9  (RWX)        : origin = 0x20022000, length = 0x2000
    C10 (RWX)        : origin = 0x20024000, length = 0x2000
    C11 (RWX)        : origin = 0x20026000, length = 0x2000
    C12 (RWX)        : origin = 0x20028000, length = 0x2000
    C13 (RWX)        : origin = 0x2002A000, length = 0x2000
    C14 (RWX)        : origin = 0x2002C000, length = 0x2000
    C15 (RWX)        : origin = 0x2002E000, length = 0x2000
    
    CTOMRAM (RX)    : origin = 0x2007F000, length = 0x0800
    MTOCRAM (RWX)   : origin = 0x2007F800, length = 0x0800
	
	OTPSECLOCK       : origin = 0x00681000, length = 0x0004
    OTP_Reserved1    : origin = 0x00681004, length = 0x0004
    OTP_Reserved2    : origin = 0x00681008, length = 0x0004
    OTP_Z2_FLASH_START_ADDR             : origin = 0x0068100C, length = 0x0004
    OTP_EMACID       : origin = 0x00681010, length = 0x0008
    OTP_Reserved3    : origin = 0x00681018, length = 0x0004
    CUSTOMER_OTP_MAIN_OSC_CLK_FREQ      : origin = 0x0068101C, length = 0x0004
    OTP_Reserved4    : origin = 0x00681020, length = 0x0004
    OTP_BOOT_MODE_GPIO_CONFIGURE        : origin = 0x00681024, length = 0x0004
    OTP_Reserved5    : origin = 0x00681028, length = 0x0004
    OTP_ENTRY_POINT  : origin = 0x0068102C, length = 0x0004
    OTP_Reserved6    : origin = 0x00681030, length = 0x0010
}

/* Section allocation in memory */

SECTIONS
{
    .intvecs:   > INTVECS, ALIGN(8)
    .resetisr:  > RESETISR, ALIGN(8)
    .text   :   > FLASH, crc_table(AppCrc, algorithm=CRC32_PRIME), ALIGN(8)
    .const  :   > FLASH, crc_table(AppCrc, algorithm=CRC32_PRIME), ALIGN(8)
    .cinit  :   > FLASH, crc_table(AppCrc, algorithm=CRC32_PRIME), ALIGN(8)
    .pinit  :   > FLASH, crc_table(AppCrc, algorithm=CRC32_PRIME), ALIGN(8)

    .vtable :   >  C0 | C1 | C2 | C3
    .data   :   >  C2 | C3
    .bss    :   >> C2 | C3
    .sysmem :   >  C0 | C1 | C2 | C3
    .stack  :   >  C2 | C3
    
    .TI.crctab : > FLASH, ALIGN(8)
    
    .z1secvalues  :   >  CSM_ECSL_Z1, ALIGN(8)
    .z1_csm_rsvd  :   >  CSM_RSVD_Z1
    .z2secvalues  :   >  CSM_ECSL_Z2
    .z2_csm_rsvd  :   >  CSM_RSVD_Z2, ALIGN(8)
                              
#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} LOAD = FLASHLOAD,
                           RUN = C0,
                           LOAD_START(RamfuncsLoadStart),
                           LOAD_SIZE(RamfuncsLoadSize),
                           LOAD_END(RamfuncsLoadEnd),
                           RUN_START(RamfuncsRunStart),
                           RUN_SIZE(RamfuncsRunSize),
                           RUN_END(RamfuncsRunEnd),
                           crc_table(AppCrc, algorithm=CRC32_PRIME),
                           PAGE = 0, ALIGN(8)
   #else
     ramfuncs            : LOAD = FLASHLOAD,
                           RUN = C0,
                           LOAD_START(RamfuncsLoadStart),
                           LOAD_SIZE(RamfuncsLoadSize),
                           LOAD_END(RamfuncsLoadEnd),
                           RUN_START(RamfuncsRunStart),
                           RUN_SIZE(RamfuncsRunSize),
                           RUN_END(RamfuncsRunEnd),
                           crc_table(AppCrc, algorithm=CRC32_PRIME),
                           PAGE = 0, ALIGN(8)   
   #endif
#endif
    
    GROUP : > MTOCRAM
    {
        PUTBUFFER  
        PUTWRITEIDX
        GETREADIDX  
    }

    GROUP : > CTOMRAM 
    {
        GETBUFFER : TYPE = DSECT
        GETWRITEIDX : TYPE = DSECT
        PUTREADIDX : TYPE = DSECT
    }    
}

__STACK_TOP = __stack + 256;

Regards,
Cody

0 Paul Lane over 4 years ago in reply to Cody Watkins

Prodigy 210 points

So in my copy of control suite, when I go to the F28M36 folder for examples, and open an example I am seeing F28M35 as the selected chip. The specifics are above.

In an attempt to correct this, when changing to the correct F28M36 chip, and compiling there are errors. detailed above.

Can you confirm the chip selected in properties, in the F28M36 properties?

Can you also load to the controlCard?

0 Cody Watkins over 4 years ago in reply to Paul Lane

TI__Mastermind 41385 points

Well, Paul it seems like you are correct.

Looking at the Project spec for that project does indicate that F28m35 is the device. I looked at the older versions of ConrolSUITE and version 100 and 110 seem to indicate F28M36 and all versions after that indicate F28M36. You could try building one of those versions if you like.

It's still unclear why this is leading to compile issue for you and not me. I suspect this would cause CCS to select the wrong target configuration when using the "Bug" icon to start a debugging session in CCS. I would suggest build your own custom target configuration to work around that issue. (go to view and select "target configurations", this will open a window pane where you can create and launch target configurations by right clicking)

Forgive me for I do not know all of the impacts that having your Project spec wrong would have. We could work trough it, but it could take some time. Give me a day or two to get this post reassigned to a software guy and they should be able to help you more quickly.

Unfortunately, do to restrictions related to COVID-19, I do not have access to a F28M36 controlCARD.

Regards,
Cody

0 Ozino Odharo over 4 years ago in reply to Cody Watkins

TI__Genius 14261 points

Paul,

Have you tried using the updated linker command file that was previously sent by Cody. The last issue in your build command has something to do with the ramfuncs attribute. By the way what version of CCS and compiler are you using?

Regards,

Ozino

0 Paul Lane over 4 years ago in reply to Ozino Odharo

Prodigy 210 points

CCS 9.3.0

Looks like I have,

ti-cgt-arm_18.12.4.LTS, and

ti-cgt-c2000_18.12.4.LTS installed in the ccs930/ccs/tools/compiler folder

TI v15.12.1.LTS [TI v18.12.4.LTS] - with a hover note about how 15 is not installed and how a compatible version will be used.

I have been able to build the driverlib and fix the ramfuncs problem in our code for a custom platform. and test several software projects. With the devboard and the example code I have yet to be able to run the example code without tons of problems. The hope is that this would be a benchmark of the lwip example, so that we can go forward with debugging our custom board with proof that the example works. It looks like the example software does not work with the configurations as is, and these configuration issues, should be fairly simple to fix in the source.

0 Ozino Odharo over 4 years ago in reply to Paul Lane

TI__Genius 14261 points

Paul,

Have you been able to figure out this issue?

Regards,

Ozino

0 Ozino Odharo over 3 years ago in reply to Ozino Odharo

TI__Genius 14261 points

Paul,

I'm closing this ticket. If you need further assistance, please submit a new ticket.

Regards,

Ozino

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMDSDOCK28M36: Issue uploading F28M36X example code