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TMS320F28335: SCI communication uses address bits to wake up abnormally

Weng
Prodigy 40 points
Part Number: TMS320F28335


Hello，

    SCI uses Address-Bit Multiprocessor Mode. In the receive interrupt, RXWAKE bit  will be set to 1 and enter the address judgment ，regardless of the check type(mark, space, etc) of received data . In other words ，RXWAKE can be awakened regardless of whether the address bit is 0 or 1.

    According to normal logic,  mark check can wake up RXWAKE bit  and other check cannot . After reading the data, RXWAKE is reset and Sleep is set to 0, RXWAKE  bit will not be 1. In addition, the same configuration is used normally in 28035.

SCI configuration code:

    ScibRegs.SCICCR.all     = 0x0f;     //SCICHAR_LENGTH_8,  Address-bit mode protocol selected

    ScibRegs.SCICTL1.all    = 0x0007;          // enable TX, RX, SLEEP // Disable RX ERR, TXWAKE

    ScibRegs.SCIHBAUD       = (((Uint32)SciB_PRD >> 8));
    ScibRegs.SCILBAUD       = (((Uint32)SciB_PRD & 0x00FF));// 115200 baud @LSPCLK = 37.5MHz.
    ScibRegs.SCICTL2.bit.TXINTENA =1;//
    ScibRegs.SCICTL2.bit.RXBKINTENA = 1;
    //ScibRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
    ScibRegs.SCIFFTX.all = 0xC040;             //SCI Reset,SCIFFENA,TXFFINTFLAG CLEAR//C040
    ScibRegs.SCIFFRX.all = 0x0061;              //RXFIFO Reset,SCIFFENA,TXFFINTFLAG CLEAR//0061
    ScibRegs.SCIFFCT.all = 0x00;
    ScibRegs.SCICTL1.all = 0x0027;              // Relinquish SCI from Reset
    ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 1;
    ScibRegs.SCIFFRX.bit.RXFIFORESET = 1;

Thanks and best regards,

Weng

  • 0
    TI__Genius 17315 points

    Weng,

    Note that in address-bit multiprocessor mode, RXWAKE reflects the value of the address bit for the character contained in SCIRXBUF.  In the case for idle-line multiprocessor mode, RXWAKE is set if the SCIRXD data line is detected as idle.  RXWAKE is a read-only flag.

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken

  • 0 in reply to Ken Schachter
    TI__Genius 17315 points

    Weng,

    It's been a while since I have heard from you last. Therefore, I am assuming that my last reply resolved your issue and I will close this thread. If this isn’t the case, please reject this resolution or reply to this thread. If this thread locks, please make a new thread describing the current status of your issue. Thank you.

    - Ken

  • 0 in reply to Ken Schachter
    Prodigy 40 points

    ken，

    Sorry, I did not reply to you in time. This failed to solve my problem. I found that the baud rate deviation will affect the address bits. If you follow the manual baud rate calculation formula, there is an error of 1.7% at 115200 baud rate. At this time, an exception occurs when the address bit wakes up. If the baud rate error is corrected and the error is changed to 0.7%, the address bit wake-up will be normal. What causes this phenomenon?

    -weng

  • 0 in reply to Weng
    TI__Genius 17315 points

    Weng,

    Please see Table 10-3. "Asynchronous Baud Register Values for Common SCI Bit Rates" on page 592 in the F2833x Technical Reference Manual.  Notice that as the idea baud rate increases the actual baud rate error increases, as well.  At an extremely high baud rate (e.g. 115200) the error will be a very large value and will need to be adjusted.

    - Ken