TMS320F280021: what is the Maximum possible frequency of the Ramp generator in the CMPSS?

Thanks Frank for the reply,

So even If the DAC register is wirtten immediately from one value to another value. The DAC will take minimum 1us to reach the final vaue?

For example if the present DAC value is set 0.5 V output and If the DAC register is updated to 1V, Then the DAC takes 1us to reach 0.5V to 1V?

Regards,

Gnana K  

Gnana,

The DAC will take a maximum of 1us to change output not minimum. This 1us is the full-scale settling time (i.e going from 0 to 4095 or vise-versa) and it's the worst case. Smaller steps could settle faster but we don't specify those. For a fully predictable output, our recommendation is to wait 1us after every change in DAC value. If the ramp generator ramps down too quickly, what you will see is that the DAC will not be able to keep up with the ramp generator.

Dear Frank,

Now it's clear. But for my application of GANFet switching, i need to control with MHz range for which i need to change the set point much faster rate.

Especially with peak current mode control i need to use RAMP generator for 1 MHz.

Please advice whether is it possible with any other Microcontroller or microcontroller option that can be used to control much faster rate?  

Regards,

Gnana K

Gnana,

I have not tried it personally but 1MHz is maybe possible for a single ramp down. At 1MHz, you are decrementing at a rate of 655 for every sysclk. This does not meet the 1us settling time criteria but since the ramp is a downward slope and the output is not changing direction, it could be ok. Where it's questionable is when the ramp generator resets to 65535 after hitting 0. The DAC will most likely not be able to get to 65535 within that short period before the ramp starts ramping down again.

The CMPSS in the F28002x device is the latest CMPSS from C2000. You could give it a try to see if it works.

Dear Frank,

Thanks for suggesting F28002x device. This is actually a 12bit DAC right? Instead of 65535 it should be 4095 right? Any how the full scale will be a 3.3 V if the supply voltage is 3.3V.

Since the controller coding and its performance for the high frequency is critical, it is required to validate the DAC output. Is it possible to probe the DAC-output from the micro-controller? 

The another option I am thinking to tackle the slow response time of the CMPSS module is that : using one DAC for a high value and another DAC for a low value . So that I can compare an analog input with two DACs' outputs whether it is within two values. In that case, am I able to change the DAC values at the same time ? , if yes, will they follow simillar trasient curve (transient in analog output of DAC from old value to new value) when the set points are changed?   

Regards,

Gnana K

Gnana,

Answers to your questions below:

1. Yes, this is a 12-bit DAC. The ramp generator output is 16-bits but the CMPSS DAC uses the MSB 12-bits and hence the LSB 4-bits effectively act as a prescale. Also yes, full scale will be 3.3v if you supply that as reference.

2. You can't bring out the CMPSS DAC onto a pin but you can use the comparator as a pseudo DMM to measure the CMPSS DAC.

3. The CMPSS DACs share some components and hence have some dependency on each other. We have this specified in the datasheet as "disturbance magnitude & settling time". You need to keep this in mind. Also, the ramp generator only goes to one of the DACs not both.

Thanks Frank for your quick responses for my questions.

If possible can you suggest a document to understand how to use a comparator as psuedo DMM to measure the CMPSS DAC.

Regards,

Gnana K

Gnana,

This approach has it's limitations as it's hard to completely rule out the effects of the comparator. Conceptually, the way it would work is:

1. Connect the CMPSS DAC to the inverting input of the comparator and set the DAC to a value.

2. Sweep the positive input of the comparator until you see a trip. The voltage on the positive input when this trip occurs is the DAC voltage + comparator offfet + comparator cmrr.

3. Repeat for all DAC values.

Conceptually this is how an ADC works. However as I mentioned, to get an accurate DAC voltage, you need to know the comparator offset and cmrr across the whole range. However, since you can't use the CMPSS DAC by itself and have to use it through the comparator, knowing the comparator offset and cmrr is not really important as that won't change.