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TMS320F280025: Missing clock detection logic

Part Number: TMS320F280025
Other Parts Discussed in Thread: C2000WARE

Hello Champs,

For missing clock detection logic and related configuration, is that of F28002x all the same with F28004x?

Here below is missing clock detection description from chapter 3.7.12.1 of F28002x TRM:

My questions are:

(1) The CLOCKFAIL can go high to generate TRIP events to PWM, will it trip all ePWM or user needs to configure which ePWMs should be tripped? How  can user configure CLOCKFAIL and the generated TRIP events? Are there any example codes for this?

(2) When NMI interrupt is generated, what should user do in NMI interrupt ISR? Have you any suggestions for that?

(3) If NMI is not enabled and MCDSTS is always set, when will reset happen?

Would you please kindly help? Thanks!

Best Regards,

Linda

  • Hi Linda,

    Please find my response to your questions below:

    1. CLOCKFAIL is internal signal which gets asserted when MCDSTS bit goes high. It automatically generates TRIP event for all the PWMs, their is no user configuration required. Their is an example related to MCD in C2000Ware, please reference the below directory:

    C:\ti\c2000\C2000Ware_3_01_00_00\driverlib\f28002x\examples\sysctl\sysctl_ex1_missing_clock_detection.c

    2. Its upto user on what to do if NMI interrupt is generated, typically you would want system to be back in safe mode by changing the clock source to INTOSC1/2 if the clock failure is observed on XTAL/X1 clock source, and clear the NMI Interrupt flags. You can reference the above example.

    3. NMI gets enabled through the boot flow, but if customer has disabled it, you wont be able to reset the system. But it will still trip the ePWMs.

    Regards,

    Nirav