Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE
Tool/software: Code Composer Studio
Hello, I'm trying to use CLB module to protect the PWM signals. The whole procedure is shown as the following picture and is similar to the demo "clb_ex4_pwm_protection".
My intention is:
GPIO2,3 is set to generate the EPWM2 signals. GPIO16 is connected to a button. When the button is pressed, the I/O will be low level.
Therefore, GPIO16 is utilized to stimulate the error signal.
In normal situation, GPIO2,3 can generate the complentary PWM signals. When the button is pressed, the output of GPIO2,3 should be low level.
Tile2 functions as an And Gate.
I followed the instructions of the user's guide and the answers presented on the forum. However, I still come across the problem:
GPIO2,3 can generate the PWM signals, but the GPIO14,15 can't. It seems that the CLB module does not work.
Some detailed explanation is included in the code.
My code is :
void main(void)
{
InitSysCtrl(); // system initial 200MHz
InitGpio();
InitEPwm1Gpio(); // GPIO0,1 is connected with two LED, and denotes the state of button
InitEPwm2Gpio(); // EPWM2A,B is the generated PWM signals.
//GPIO16 is set as I/O and is connected to a button.
//When the button is pressed, the low level denotes the PWM faults
//and the PWM signals should be blocked.
GPIO_SetupPinMux(16,0,0);
GPIO_SetupPinOptions(16, 0, GPIO_PULLUP); //
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
EDIS;
InitEPwm2Example(); // 10kHz
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;
IER = 0; // interrupt is disabled
// ------- The code above can work normally. My question is about the setting of CLB Regs.
EALLOW;
// Set GPIO16 as Input Xbar1
XBAR_setInputPin(XBAR_INPUT1, 16);
//Set InputXbar 1 as XBAR_AUXSIG0
HWREG(XBAR_CLB_CFG_REG_BASE + XBAR_O_AUXSIG0MUX0TO15CFG) |= 4;
// Enable XBAR_AUXSIG0
HWREG(XBAR_CLB_EN_REG_BASE + XBAR_AUXSIG0) |= XBAR_MUX01;
EDIS;
// choose CLB2_BASE
CLB_configLocalInputMux(CLB2_BASE, CLB_IN0, CLB_LOCAL_IN_MUX_GLOBAL_IN);
CLB_configLocalInputMux(CLB2_BASE, CLB_IN1, CLB_LOCAL_IN_MUX_GLOBAL_IN);
CLB_configLocalInputMux(CLB2_BASE, CLB_IN2, CLB_LOCAL_IN_MUX_GLOBAL_IN);
CLB_configLocalInputMux(CLB2_BASE, CLB_IN3, CLB_LOCAL_IN_MUX_GLOBAL_IN);
CLB_configLocalInputMux(CLB2_BASE, CLB_IN4, CLB_LOCAL_IN_MUX_GLOBAL_IN);
CLB_configLocalInputMux(CLB2_BASE, CLB_IN5, CLB_LOCAL_IN_MUX_GLOBAL_IN);
CLB_configLocalInputMux(CLB2_BASE, CLB_IN6, CLB_LOCAL_IN_MUX_GLOBAL_IN);
CLB_configLocalInputMux(CLB2_BASE, CLB_IN7, CLB_LOCAL_IN_MUX_GLOBAL_IN);
// GPIO16--> Input Xbar 1 --> AUXSIG0 --> Boundary 0
// EPWM2A_DB --> Boundary 1
// EPWM2B_DB --> Boundary 2
CLB_configGlobalInputMux(CLB2_BASE, CLB_IN0, CLB_GLOBAL_IN_MUX_CLB_AUXSIG0);
CLB_configGlobalInputMux(CLB2_BASE, CLB_IN1, CLB_GLOBAL_IN_MUX_EPWM2A_DB);
CLB_configGlobalInputMux(CLB2_BASE, CLB_IN2, CLB_GLOBAL_IN_MUX_EPWM2B_DB);
CLB_configGlobalInputMux(CLB2_BASE, CLB_IN3, CLB_GLOBAL_IN_MUX_EPWM1A);
CLB_configGlobalInputMux(CLB2_BASE, CLB_IN4, CLB_GLOBAL_IN_MUX_EPWM1A);
CLB_configGlobalInputMux(CLB2_BASE, CLB_IN5, CLB_GLOBAL_IN_MUX_EPWM1A);
CLB_configGlobalInputMux(CLB2_BASE, CLB_IN6, CLB_GLOBAL_IN_MUX_EPWM1A);
CLB_configGlobalInputMux(CLB2_BASE, CLB_IN7, CLB_GLOBAL_IN_MUX_EPWM1A);
// Select External for CLB2, IN0,1,2
CLB_configGPInputMux(CLB2_BASE, CLB_IN0, CLB_GP_IN_MUX_EXTERNAL);
CLB_configGPInputMux(CLB2_BASE, CLB_IN1, CLB_GP_IN_MUX_EXTERNAL);
CLB_configGPInputMux(CLB2_BASE, CLB_IN2, CLB_GP_IN_MUX_EXTERNAL);
CLB_configGPInputMux(CLB2_BASE, CLB_IN3, CLB_GP_IN_MUX_GP_REG);
CLB_configGPInputMux(CLB2_BASE, CLB_IN4, CLB_GP_IN_MUX_GP_REG);
CLB_configGPInputMux(CLB2_BASE, CLB_IN5, CLB_GP_IN_MUX_GP_REG);
CLB_configGPInputMux(CLB2_BASE, CLB_IN6, CLB_GP_IN_MUX_GP_REG);
CLB_configGPInputMux(CLB2_BASE, CLB_IN7, CLB_GP_IN_MUX_GP_REG);
EALLOW;
//Set GPIO14 as outputXbar 3
GpioCtrlRegs.GPAPUD.bit.GPIO14 = 1; // Disable pull-up on GPIO14
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 6; // Configure GPIO14 as outputbar3
GpioCtrlRegs.GPADIR.bit.GPIO14 = 1; // Output
// Set GPIO15 as outputXbar 4
GpioCtrlRegs.GPAPUD.bit.GPIO15 = 1; // Disable pull-up on GPIO15
GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 6; // Configure GPIO15 as outputbar4
GpioCtrlRegs.GPADIR.bit.GPIO15 = 1; // Output
//
OutputXbarRegs.OUTPUTLOCK.all = 0; // Allow to modify the following REG
OutputXbarRegs.OUTPUT3MUX0TO15CFG.bit.MUX5 = 2; // Set CLB2_OUT4 as outputXbar 3
OutputXbarRegs.OUTPUT3MUXENABLE.bit.MUX5 = 1; //Enable output Xbar3
OutputXbarRegs.OUTPUT4MUX0TO15CFG.bit.MUX7 = 2; //Set CLB2_OUT5 as outputXbar 4
OutputXbarRegs.OUTPUT4MUXENABLE.bit.MUX7 = 1; //Enable output Xbar4
CLB_setOutputMask(CLB2_BASE, 1 << 6 | 1 << 7, true); //Let CLB_OUT6、7 substitute DB_PWM2A、B。
EDIS;
//Initial the CLB2 and Enable
initTILE2(CLB2_BASE);
CLB_enableCLB(CLB2_BASE);
//EINT; //
//ERTM; // Disable the interrupt
// The following GPIO16 can work normally
for(;;)
{
// Detect whether button is pressed
if (GpioDataRegs.GPADAT.bit.GPIO16 == 0)
{
GpioDataRegs.GPASET.bit.GPIO0 = 1; // Led on
DELAY_US(100);
}
else
{
GpioDataRegs.GPACLEAR.bit.GPIO0 = 1; // Led off
DELAY_US(100);
}
}
}
The Tile configuration is shown as :
At the EPWM2 I/O, the PWM signal is normal. However, at the Output Xbar I/O, there doesn't exist signals.
After the button is pressed, the led can work normally, but the EPWM2 signal does not changed.
Where's the mistake of my code?
