This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: TMS320F28032
my customer is allocating the IsrRamfuncs into different places for LOAD and for RUN as shown below:
But they get the error below:
It seems that the problem is caused by IsrRamfuncs size> RAML0 and also >RAML1.
What I don't understand is "RAML0+RAML1" is larger than IsrRamfuncs, why it still has error report below?
I think the syntax should be :
RUN = RAML0 | RAML1
RUN >> RAML0 | RAML1,
Thanks & Regards,
If this answers your question, please click the green "Verified Answer" button.
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to Santosh Jha:
The same problem happens after changing the syntax.
I want to point out that RAML0 and RAML1 are not adjacent.
In reply to Howard Zou:
Are you getting same error or it is different error? Can you create a big section which is good for the size and then try it? May be there is some issue in automatic splitting between the sections.
The same error.
If I rewrite the CMD file and create a bigger single section, it's good.
Why can't the CCS automatically split my code into two sections? The two sections in total is large enough.
I have seen similar issue. I will follow it up with CCS team.
any update on this question?
I see multiple things wrong. I'd like to address them one at a time.
According to the error message in the first post, the size of the output section IsrRamfuncs is 0x902 words, the size of the memory range RAML0 is 0x900 words, and the size of the RAML1 memory range is 0x100 words. Is the IsrRamfuncs output section made up of a single input section from one file? If you don't understand that question, please read the first part of the article Linker Command File Primer to understand the difference between the terms output section and input section.
Thanks and regards,
TI C/C++ Compiler Forum ModeratorPlease click This Resolved My Issue on the best reply to your questionThe CCS Youtube Channel has short how-to videosVisit this FAQ to learn how to search for a bug
In reply to George Mock:
Is my question, in my project, the IsrRamfuncs is our program code but run in RAM code define like #pragma CODE_SECTION(my function, "IsrRamfuncs"); but the "IsrRamfuncs" is so big , over 0x900, the origianl CMD configuration of RAML0 is only 0x900 length, in other RAM places, RAML1 is 0x100 length can be use, i don't want change the RAM space configuration, how can i load the IsrRamfuncs into the union of RAML0 and RAML1?
In reply to user6421701:
This thread was started by Howard Zhou. I presume you are working with Howard on the same problem.
There is a solution to your problem. But it requires some significant changes.
I presume the output section IsrRamfuncs contains multiple functions that are defined in the same source file. For that source file, please add the compiler build option --gen_func_subsections. This option causes the compiler to put each function into a separate section with names similar to IsrRamfuncs:_name_of_function. These separate sections can then be allocated to different memory ranges.
In the linker command file, remove the code shown in the first post, and replace it with something similar to ...
IsrRamfuncs : LOAD = FLASHD,
RUN >> RAML0 | RAML1,
PAGE = 0
.binit : > FLASHD
This creates an output section named IsrRamfuncs. It is composed of all the input sections which start with the name IsrRamfuncs, such as IsrRamfuncs:_name_of_function. It it loaded into the FLASHD memory range. The run allocation is split across the memory ranges RAML0 and RAML1, in that order. The split occurs on input section boundaries. In this specific case, that means the split occurs on function boundaries.
In the previous system, the method to copy from load memory to run memory is similar to ...
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
This method presumes both the run allocation and the load allocation are a single contiguous block of memory. Because the run allocation is split, that doesn't work. Please find this line in the source and comment it out.
The line table(BINIT) uses a feature of the linker called copy tables. These copy tables are how the functions are copied from flash to RAM. To learn more about them, please search the C28x assembly tools manual for the sub-chapter titled Using Linker-Generated Copy Tables. In summary, a copy table can handle a split allocation of the load memory, the run memory, or both. The BINIT argument means the BINIT copy table is used to perform this copy. The BINIT copy table is automatically handled by the startup code in the compiler RTS library. If that startup code is replaced with a different implementation, then this solution does not work.
The BINIT copy table is in the output section named .binit. This an initialized section like .text. The last line allocates this section to flash memory.
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.