Hi,
analog subsystem of the latest generation of Delfino MCUs (including dual core models F2827xD and F2838xD) features internal ramp generator as well, which in combination with programable comparator (combination of DAC and internal analog comparator) greatly simplifies implementation of PCC (peak-current control) with all its benefits. However, it seems that there is only one ramp generator available (please, correct me if I am mistaken!). Thus, it seems that implementation of a multiple phase-leg Interleaved peak-current control by internal resources of the MCU requires again some additional (external) hardware resources (for generation of compensation slopes, for more independent DAC references etc.). Could you please suggest an effective workaround for this problem (employing minimal amount of external HW resources)?
Best regards
Nenad