LAUNCHXL-F28379D: How to get a suitable TI device with a good RAM size (PAGE = 0) and a high-speed CPU? and what is the difference between RAM and flash memory in terms of the model speed?

#ifdef CLA_BLOCK_INCLUDED
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are. 
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_BLOCK_INCLUDED
MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN           	: origin = 0x000000, length = 0x000002
   BEGIN_FLASH     	: origin = 0x080000, length = 0x000002
   #ifdef CPU1
       RAMM0           	: origin = 0x000122, length = 0x0002DE
   #else
       RAMM0           	: origin = 0x000080, length = 0x000380
   #endif
   RAMD0           	: origin = 0x00B000, length = 0x000800
   #ifdef CLA_BLOCK_INCLUDED
        RAMLS_PROG      	: origin = 0x00A000, length = 0x000800
        RAMLS_CLA_PROG      : origin = 0x00A800, length = 0x000800
   #else
        RAMLS_PROG      	: origin = 0x009000, length = 0x002000
   #endif //CLA_BLOCK_INCLUDED
   #ifdef CPU1       
       #if BOOT_FROM_FLASH
            RAMGS_PROG       : origin = 0x017000, length = 0x001000
       #else
            RAMGS_PROG       : origin = 0x014000, length = 0x004000
       #endif
   #endif

   RESET           	: origin = 0x3FFFC0, length = 0x000002
   /* Flash sectors */
   FLASHA_N           : origin = 0x080002, length = 0x03FFFE	/* on-chip Flash */ 

PAGE 1 :
   #ifdef CPU1
       BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   #else
       BOOT_RSVD       : origin = 0x000002, length = 0x00007E     /* Part of M0, BOOT rom will use this for stack */
   #endif
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800
   #ifdef CLA_BLOCK_INCLUDED
        RAMLS_CLA_DATA      : origin = 0x008000, length = 0x001000
        RAMLS_DATA          : origin = 0x009000, length = 0x001000
   #else
        RAMLS_DATA          : origin = 0x008000, length = 0x001000
   #endif //CLA_BLOCK_INCLUDED
   #ifdef CPU1       
       #if BOOT_FROM_FLASH
            RAMGS_DATA       : origin = 0x00C000, length = 0x00B000
       #else
            RAMGS_DATA       : origin = 0x00C000, length = 0x008000
       #endif
   #endif
   CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080

   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
}


SECTIONS
{
#if BOOT_FROM_FLASH
   /* Allocate program areas: */
   .cinit              : > FLASHA_N      PAGE = 0, ALIGN(4)
   .pinit              : > FLASHA_N,     PAGE = 0, ALIGN(4)
   .text               : > FLASHA_N      PAGE = 0, ALIGN(4)
   codestart           : > BEGIN_FLASH       PAGE = 0, ALIGN(4)
   ramfuncs            : LOAD = FLASHA_N,
                         RUN = RAMLS_PROG,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)
   /* Initalized sections go in Flash */
   .econst             : > FLASHA_N      PAGE = 0, ALIGN(4)
   .switch             : > FLASHA_N      PAGE = 0, ALIGN(4)
   /* Allocate IQmath areas: */
   IQmath			: > FLASHA_N, PAGE = 0, ALIGN(4)            /* Math Code */
   IQmathTables		: > FLASHA_N, PAGE = 0, ALIGN(4)
   
   #ifdef CLA_BLOCK_INCLUDED
       /* CLA specific sections */
       Cla1Prog         : LOAD = FLASHA_N,
                          RUN = RAMLS_CLA_PROG,
                          LOAD_START(_Cla1funcsLoadStart),
                          LOAD_END(_Cla1funcsLoadEnd),
                          RUN_START(_Cla1funcsRunStart),
                          LOAD_SIZE(_Cla1funcsLoadSize),
                          PAGE = 0, ALIGN(4)
   #endif //CLA_BLOCK_INCLUDED
#else
   codestart        : > BEGIN,     PAGE = 0
   ramfuncs         : > RAMM0      PAGE = 0
   #ifdef CPU1
       .text            : >>RAMM0 | RAMD0 | RAMLS_PROG | RAMGS_PROG,   PAGE = 0
   #else
       .text            : >>RAMM0 | RAMD0 | RAMLS_PROG,   PAGE = 0
   #endif
   .cinit           : > RAMM0 | RAMD0 | RAMLS_PROG,   PAGE = 0
   .pinit           : > RAMM0,     PAGE = 0
   .switch          : > RAMM0,     PAGE = 0
   .econst          : > RAMLS_DATA,    PAGE = 1
   /* Allocate IQ math areas: */
   IQmath			: > RAMLS_PROG,     PAGE = 0            /* Math Code */
   IQmathTables		: > RAMLS_PROG, PAGE = 0

   #ifdef CLA_BLOCK_INCLUDED
       /* CLA specific sections */
       Cla1Prog         : > RAMLS_CLA_PROG, PAGE=0
   #endif //CLA_BLOCK_INCLUDED
#endif
   .stack           : > RAMM1,     PAGE = 1
   #ifdef CPU1
       .ebss            : >> RAMLS_DATA| RAMD1 | RAMGS_DATA ,    PAGE = 1
   #else
       .ebss            : >> RAMLS_DATA| RAMD1,    PAGE = 1
   #endif
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
   .esysmem         : > RAMLS_DATA,    PAGE = 1
   
   #ifdef CLA_BLOCK_INCLUDED
       /* CLA C compiler sections */
       //
       // Must be allocated to memory the CLA has write access to
       //
       Cla1DataRam0		: > RAMLS_CLA_DATA, PAGE=1

       Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
       CLAscratch       :
                         { *.obj(CLAscratch)
                         . += CLA_SCRATCHPAD_SIZE;
                         *.obj(CLAscratch_end) } >  RAMLS_CLA_DATA,  PAGE = 1

       .scratchpad      : > RAMLS_CLA_DATA,       PAGE = 1
       .bss_cla		    : > RAMLS_CLA_DATA,       PAGE = 1
       .const_cla	    :  LOAD = FLASHA_N,
                           RUN = RAMLS_CLA_DATA,
                           RUN_START(_Cla1ConstRunStart),
                           LOAD_START(_Cla1ConstLoadStart),
                           LOAD_SIZE(_Cla1ConstLoadSize),
                           PAGE = 1
   #endif //CLA_BLOCK_INCLUDED
   #ifdef CPU1  
       /* The following section definitions are required when using the IPC API Drivers */ 
        GROUP : > CPU1TOCPU2RAM, PAGE = 1 
        {
            PUTBUFFER 
            PUTWRITEIDX 
            GETREADIDX 
        }
        GROUP : > CPU2TOCPU1RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
        }
   #else
       /* The following section definitions are required when using the IPC API Drivers */ 
        GROUP : > CPU2TOCPU1RAM, PAGE = 1 
        {
            PUTBUFFER 
            PUTWRITEIDX 
            GETREADIDX 
        }
        GROUP : > CPU1TOCPU2RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
        }
   #endif 
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/