This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28379S: Biss-C library: Can Reset feedback position?

Part Number: TMS320F28379S

Hello,


I'm using the Texas Library Biss-C based on the CLB block on an F28379S.

To facilitate customer technical service, if motor is replaced (because failled) we want to replace it with an identical motor.

But our motor manufacturer can't set the "Biss Zero position" always with the same "electrical motor position" (PMSM)


For other motor, like Serial T-Format, we can reset the absolute Position and the multi turn position.


I know some Biss feedback can do it (bi-directional), like the following exemple found on internet (See p7 for Commande register 0x60)

https://www.amo-gmbh.com/wp-content/uploads/2020/05/SP-EW_InterfaceDescription_BiSSC_rev09.02-2.pdf

Is Ti Biss Library implement a function to Reset the encoder position? (I think the Ti library is only Unidirectional)??

If no, we have not access to the CLB source and C source if I want update myself the library to take the bidirectional format?

Is planned or possible to get this source? Or Ti can schedule to add this functionality?


Reagrds,

  • Hello,

    If I understand you need read/write capability to registers.  The BiSS encoder interface on F2837xD does support sending register read/writes via the CDS bit.   The project needs to be compiled with the #fine BISS_ENCODER_HAS_CD_INTERFACE set to 1.  The system example includes a read from address 0x7E.

    		#if BISS_ENCODER_HAS_CD_INTERFACE
    		//every so often, do a CD transaction
    		if(bissCDCounter < 0)
    		{
    			//for Lika HS58S18/I7, addr 0x7E (ManuID MSB) should contain 0x4C (CRC on packet should be 0xF)
    			bissc_data_struct.cd_register_xfer_address = 0x7E;
    			bissc_data_struct.cd_register_xfer_is_write = 0;
    			bissc_data_struct.cd_status = 0;  //arm new
    			bissCDCounter = 1000;
    		}

    In your case, for a write, change register_xfer_is_write to 1, and set the appropriate register_xfer_address and set cd_register_xfer_txdata values.

    Regards

    Lori

  • Thank for this back

    I will test that.

    What I not know, is if all Biss feedback use the same mechanisum than link given in example above regarding the "Reset position" Or "Set an Offset" allowing by this to set into all motor the same angle reference relative to the electrical zero reference of the motor.

    Do you know that?

  • A GIR said:
    What I not know, is if all Biss feedback use the same mechanisum than link given in example above regarding the "Reset position" Or "Set an Offset" allowing by this to set into all motor the same angle reference relative to the electrical zero reference of the motor.

    This register may be encoder specific. I suggest checking the BiSS specifications on the iC-Haus website or contacting their support line for clarification. 

    Regards

    Lori

  • Hello,

    I try to use the biss exemple.

    Is somebody make work exemple with BISS_ENCODER_HAS_CD_INTERFACE activated?

    I think there a a mistake into the code in bissc_doCDTasks:

    ...
    bissc_data_struct.remaining_cd_bits = 32;
    ...
    temp32 = bissc_data_struct.cdm >> 16;
    temp32 = (~(temp32 >> (bissc_data_struct.remaining_cd_bits - 16))) & 0x1;
    ...
    

    By thiese line of code, the CDM value is shifted to the right of 16 bits, then at the next line, it is shift again of (32-16) then 16bits also.

    Total Shift: 32bits shift on an uint32.

    To have a correct behavior, I think remaining_cd_bits must be initialized to the number of Bit - 1 => 31.

    Could you confirm this?

    If I'm right, this Is why I asked if any body test that?!

    So, on my side, I make the correction, then I see with the scope the CDM\ bit change according the wanted request,

    But from the slave, the CDS bits still always 0!

    Do you have any idea why the CDS bit could stay at 0?

    regards

  • Hello,

    I try to use the biss exemple.

    Is somebody make work exemple with BISS_ENCODER_HAS_CD_INTERFACE activated?

    I think there a a mistake into the code in bissc_doCDTasks:

    ...
    bissc_data_struct.remaining_cd_bits = 32;
    ...
    temp32 = bissc_data_struct.cdm >> 16;
    temp32 = (~(temp32 >> (bissc_data_struct.remaining_cd_bits - 16))) & 0x1;
    ...
    

    By thiese line of code, the CDM value is shifted to the right of 16 bits, then at the next line, it is shift again of (32-16) then 16bits also.

    Total Shift: 32bits shift on an uint32.

    To have a correct behavior, I think remaining_cd_bits must be initialized to the number of Bit - 1 => 31.

    Could you confirm this?

    If I'm right, this Is why I asked if any body test that?!

    So, on my side, I make the correction, then I see with the scope the CDM\ bit change according the wanted request,

    But from the slave, the CDS bits still always 0!

    Do you have any idea why the CDS bit could stay at 0?

    The read position (SCD data) is ok

    regards

    Note: I'm using the following feedback

    www.posital.com/.../Manual_BiSS_C_Absolute_Kit_Encoders.pdf

  • A GIR said:

    By thiese line of code, the CDM value is shifted to the right of 16 bits, then at the next line, it is shift again of (32-16) then 16bits also.

    Total Shift: 32bits shift on an uint32.

    To have a correct behavior, I think remaining_cd_bits must be initialized to the number of Bit - 1 => 31.

    Could you confirm this?

    Hello,

    It does look like the interface is sending an extra CDM = 0 (in red) before it sends the ST = 1 (blue) bit.   ( The inversion that happens makes it a little confusing - refer to the register read / write access in the BiSS-C spec -  https://www.ichaus.de/upload/pdf/BiSS_C_protocol_C6en.pdf Figure 14 and Figure 15).

    This leading shouldn't impact the encoder responding - it will only delay it by one BiSS frame.   I stepped through the code using this example:

    CDM  = 0xC3FB74A8

    ST CTS ID .....
    32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 <-- remaining_cd_bits

    1 1 0 0 0 0 1 1 1 1 1 1 1 0 1 1 <-- CDM
    1 0 0 1 1 1 1 0 0 0 0 0 0 0 1 0 0 <-- setCDBit()

                       

    15  14 13 12 11 10  9 8 7 6 5 4 3 2 1 0   -1
    0   1  1  1  0  1  0 0 1 0 1 0 1 0 0 0b
    1   0  0  0  1  0  1 1 0 1 0 1 0 1 1 1b   x    

    A GIR said:

    But from the slave, the CDS bits still always 0!

    Do you have any idea why the CDS bit could stay at 0?


    The encoder should respond as shown in Figure 14/15 of the BiSS-C specification.  Most CDS bits at the beginning will be 0, but at least the R/W bits will be echoed back. 

  • Hello,

    For the extra bit, yes you are right. I'm disturbed by this and think at the end the last bit was not transmitted.

    But it is ok for that.

    Then I check with the scope, The frame is Ok for the CDM\  bit. Bellow you can see the "STart bit": CDM\ =0.

    But on the next frame, like I have only one Biss slave, the IDL0 bit should be set at least, with some frame later (some CDS bit later) the R and W bit...

    But all is 0.

    I confirm this by scope view, then the cds_stream = 0.

    So on the step 2 with the following code:

    rxdRWS = ((DV_Biss_Data.cds_stream>>12) & 0x00000007);
    
          /* 0x3 = Write command was sent, 0x5 = Read command was sent */
          if ((rxdRWS == 0x3) || 
              (rxdRWS == 0x5)
             )
    

    The test fail of course...

    So The problem seems come from the encoder. What could be the reason to not have CDM/CDS bit encoder nor response ?

    Zoom on the start bit after the Biss busy time of the feedback (about 6µs), The CDS bit following the Start bit is always 0.:

  • A GIR said:
    What could be the reason to not have CDM/CDS bit encoder nor response ?

    I have one thought.  The BiSS specification states that a control frame has to be proceeded by 14 cycles with CDM = 0.  Can you try first sending at least 14 position requests (with CDM = 0) before the control frame starts (CDM = 1)?

    Regards

    Lori

  • Hello,

    By default, the CDM\ sent is 1 (Then CDM = 0)

    Thenn all previous frame (sent periodically at 100µs) havs already CDM = 0.

    The Biss library indicate without PM_bissc_setCDBit() the default value sent is CDM = 0 (CDM\ = 1).

    And this is why I seen on the scope. All frame without call "PM_bissc_setCDBit" are sent with CDM\ = 1.

    Regards

  • Hello,

    I'm not sure I understand.  Are you saying the library is doing the opposite of what it should be default?  Have you tried using PM_bissc_setCDBit() to change the default state?  If I've misunderstood please let me know.

    Regards

    Lori

  • I just want say, in the doc it is written:

    "Set the CDM bit before starting the BiSS-C transfer using PM_bissc_startOperation. If no
    CDM bit is set for the current transfer, the module transmits a default value of 1."

    It is the case, I check with the scope. By default, the state of the clock signal on the TimeOut is "1". This the CDM bit interpreted by the slave by default is "0".

    This behavior is Ok, si like I have frame transmitted every 100µs, 14 "Zero" bit are transmitted at least.

    When I want make a request "CD" transfert", I repeat again 14 step where I not configure the CD bit, then by default it is to "1" interpreted to "0" by the slave.

    To resume, at the question "is are you make at least 14 CDM bit to 0 before start communication CD", the response is YES.

    In any case, the CDS bit stay to 0 whereas the Biss specification indicate the IDL0 bit should be set just after the reception of the Start bit.

    This is not hte case. It is like the Biss encoder is not compatible with the "CD" transmission, whereas it's datasheet indicate to be compatible.

    I can't find any reason to not see at least the IDL0 bit set to 1...

    I'm blocked :-(

  • A couple of thoughts 

    • Contact the encoder manufacturer to see if they have any suggestions
    • I noticed the encoder has a 2nd method of communication through a UART?  I'm not sure if there is a hardware setting to switch between the two?  You mentioned the position response is ok, so it doesn't seem to be the case but worth researching. 

    Regards

    Lori

  • Hello,

    I just found a contact to have direct support from the manufacturer.

    I hope this will help.

    I will back here if I found the problem.

    Thank

  • Great!  Looking forward to hearing what you find out. 

    Regards

    Lori

  • Hello

    We are waiting some support from manufacturer to understand why coder never response on CD part.

    I have similar question, but on the similar ENDAT library.

    Is there any command on the Endat library allowing to reset the "Single Turn" and/or "Multi Turn" value of a Endat encoder?

    Thank

  • Hello,

    A GIR said:
    Is there any command on the Endat library allowing to reset the "Single Turn" and/or "Multi Turn" value of a Endat encoder?

    Details of the EnDat protocol and commands supported in different modes can be obtained from Heidenhain. Table 4 and Table 5 show the commands supported by the EnDat22 Library.

    In the document (https://www.ti.com/lit/tidude3)  Table 4 and Table 5 show the commands supported by the EnDat22 Library.

    Regards, Lori

    I am out of the office through January 3 for end of the year holidays.  Because of this, there will be a delay in my responses until then. 

  • Hello

    The problem was found!

    Our motor manufacturer which integrate the BIss encoder made a mistake and reverse the signal Clock+ and Clock-..

    This has effect to work for read position.... but not for CD communication...

  • Thank you for the feedback!

    Best Regards

    Lori