TMS320F28388D: Operating multiple core on SYS/BIOS

Donghee Kim

Prodigy 90 points

Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE, SYSBIOS

Hello. i'm a beginner of TMS320F28388D , trying to run CPU1 , CPU2 and CM with SYS/BIOS.

Here's the version of program that i'm using

- CCS 10.1.1

- C2000Ware 3.03.00

- Complier V20.2.1.LTS

- Xdc tool 3.61.02.27

- BIOS 6.83.00.18

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Thanks to previous E2E post, ( e2e.ti.com/.../973351 )

I can manage Hwi & Task & etc.. with SYS/BIOS on both CPU1, CPU2. Thanks to you , E2E support team.

Now, I'm trying to expand TMS320F28388D usage to CM. So My new goal is managing CPU1 , CPU2 , CM with SYS/BIOS.

Trying to setting CM project and debugging CPU1 + CPU2 + CM , there's an autorun issue

( Cortex_M4_0: AutoRun: Target not run as breakpoint could not be set: _JobHardwareBreakpoint::ARM_DEBUG_V7M_fpb_add_breakpoint: FPB : All resources are in use.[25062] ).

CM is running as I debug, and does not turn back into HW breakpoint state even after I restart CM. I think it is about same issue with my previous post.

Here are error messages on ROV below :

-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Error: java.lang.Exception: Target memory read failed at address: 0x8, length: 36 This read is at an INVALID address according to the application's section map.

The application is likely either uninitialized or corrupt. ti.sysbios.family.arm.m3.Hwi:Detailed:N/A ((0x2000d9cc)):

Caught exception in view init code: "C:/ti/ccs1011/xdctools_3_61_02_27_core/packages/xdc/rov/StructureDecoder.xs", line 554: java.lang.

Exception: Target memory read failed at address: 0x0, length: 320 This read is at an INVALID address according to the application's section map.

The application is likely either uninitialized or corrupt. ti.sysbios.family.arm.m3.Hwi:Module:hwiStackPeak

(N/A): Error fetching Hwi stack info! ti.sysbios.family.arm.m3.Hwi:Module:hwiStackSize

(N/A): Error fetching Hwi stack info! ti.sysbios.family.arm.m3.Hwi:Module:hwiStackBase

(N/A): Error fetching Hwi stack info! ti.sysbios.knl.Task:Module:hwiStackPeak

(N/A): Error fetching Hwi stack info! ti.sysbios.knl.Task:Module:hwiStackSize

(N/A): Error fetching Hwi stack info! ti.sysbios.knl.Task:Module:hwiStackBase (N/A): Error fetching Hwi stack info!

--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

In previous post ( CPU2 autorun issue ) , E2E support team ( especially Whitney Dewey , thank you again !) sends me .cmd file.

I created a new CM project and edited nothing. So I think editing .cmd file & stack size can be a solution once again.

Could you explain more about about it ?

Regards,

Donghee Kim.

over 4 years ago

0 Whitney Dewey over 4 years ago

TI__Guru 53805 points

As for the breakpoint issue, check out Santosh's comments in this thread on things you can disable to free up breakpoints:

https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/882513?TMDSCNCD28388D-TMS32F28388x-SYS-BIOS-break-point

How did you create your project? Which example or template did you use as a starting point? I created one using the "Minimal" project and was able to load it an run right away. There appears to be plenty of room on the stack by default.

Whitney

0 Donghee Kim over 4 years ago in reply to Whitney Dewey

Prodigy 90 points

Thank you for replying.

I checked out Santosh's comments and resolved autorun isssue. thanks!

Anyway, I usually create project based on typical project.

For now, it seems that there's no problem with it because project ( about base setting & running task ) runs properly.

Now i'm trying to call ePWM ISR on CM, receving interrupt event signal on CPU1.

I thought it was quite simple because there is another ePWM ISR on CPU2 and it worked well.

so I just copied CPU2's ISR function to CM. and then here's my ISR on CM

--------------------------------------------------------------------------------------------------------

__ interrupt void epwm1_isr(void)
{
    if(epwm1_isr_cnt3 >= 16000)
    {
        GPIO_togglePin(31);
        epwm1_isr_cnt3=0;
    }
    else
    {
        epwm1_isr_cnt3++;
    }

    //= Clear INT flag for this timer
    EPwm1Regs.ETCLR.bit.INT = 1;
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}

As you know, "EPwm1Regs.ETCLR.bit.INT = 1;" & "PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;" needs globalvariabledef.c to be activated.

To activate this source file , project also needs "f2838x_device.h" as a header file that activated when there's predefined symbols (CPU1 or CPU2 ,but not CM)

I think these "EPwm1Regs.ETCLR.bit.INT = 1;" & "PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;" must be included. ( because there are several Hwi ISR on other cores )

How do I define global peripheral variables on CM? or is there another way to replace these features?

Regards,

Kim

0 Whitney Dewey over 4 years ago in reply to Donghee Kim

TI__Guru 53805 points

Those header files are intended for use on the C28x cores. For the CM, we provide the driverlib for configuring and interacting with peripherals--see the CM driverlib examples in C2000ware under driverlib\f2838x\examples. To my knowledge the CM doesn't have access to the ePWM. See the NVIC Interrupt Mapping table in the device's technical reference manual on what interrupts exist on the CM.

Whitney

0 Donghee Kim over 4 years ago in reply to Whitney Dewey

Prodigy 90 points

Whitney Dewey said:
To my knowledge the CM doesn't have access to the ePWM

I agree with that. I just need to confirm about it.

Thank you Whitney!

Regards,

Kim

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TMS320F28388D: Operating multiple core on SYS/BIOS