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TMS320F28069M: ADC drive of TMS320F28069M

Lars Gilstrom
Prodigy 10 points
Part Number: TMS320F28069M


Is there app note for use of the ADC on our TMS320F28069MPZT?  We are getting some errors in the ADC and the datasheets for the MCU don’t really give you reference circuit for driving the ADC’s.

We see loading of our circuit if we have a 500 ohm series resistor with an input impedance 1K resistor in parallel with 10K NTC.   

  • 0
    TI__Guru 62975 points

    Lars,

    There is this model in the datasheet for ADC inputs:

    The ADC ACQPS should be configured such that Ch is able to settle within the desired accuracy level within the sampling window.  There is no built-in preconditioning of the Ch starting voltage so it is best to assume the worst-case residual voltage (usually VSSA or VDDA).

    -Tommy

  • 0 in reply to tlee
    TI__Expert 5140 points

    Team,

    Please provide Lars with the following:

    - reference circuit and offer some discussion on the effect of using different input impedances (specifically what values of voltage dividers should require buffering and what type don't need them.

    - What errors are induced if the input impedances are too high?

    Thanks!

  • 0 in reply to Siby James
    TI__Guru 62975 points

    Siby,

    We do not have a standard reference design for driving the ADC input primarily because the ACQPS window is programmable.  There is an application report in the works for this topic, but I have no estimate for when it will be ready for publication.

    There are two general ways to approach the ADC input.  The first is for high-bandwidth input signals and the second is for low-bandwidth input signals.  The goal for both is to match the input signal characteristics with an appropriate ACQPS window.

    High-bandwidth signals usually have an ACQPS ceiling (must be short or else the signal cannot be reproduced).  The ADC input model can be simplified as a 2nd-order passive low-pass filter (two R-C filters in series).  The Cp, Ron, and Ch values are fixed so the user can calculate the maximum Rs value to meet the bandwidth needs of the input signal.  The Fc cut-off is roughly 1/(2π√(RsCpRonCh)).

    For low-bandwidth input signals, the ACQPS can be increased to allow for additional settling time through the R-C filters.  This is often the case where Rs is fixed in the kΩ range.  When Rs is a known value, the user can use the same Fc equation to calculate for the minimum ACQPS required to charge the Ch cap.  If the calculated ACQPS window is too long for practical use, a large external capacitor (>~100nF) can be placed on the pin between Rs and Cp to help charge Ch faster when the sampling switch is connected.

    This thread has additional technical discussion:

    -Tommy