[2803x] [Flash] Piccolo F2803x Flash API

johnson lung

Other Parts Discussed in Thread: TMS320F28035, TLC7225

Hello sirs,

I want to implement the Flash API for Piccolo F28034, and I download TMS320F2803x Flash APIs(sprc907.zip).

In the Flash2803x_API_Library.h, it indicates:

API load/run symbols:
These symbols are defined by the linker during the link. Refer to the
Flash28_API section in the example .cmd file:

   Flash28_API:
   {
        Flash28035_API_Library.lib(.econst)
        Flash28035_API_Library.lib(.text)
   } LOAD = FLASH,
     RUN = SARAM,
     LOAD_START(_Flash28_API_LoadStart),
     LOAD_END(_Flash28_API_LoadEnd),
     RUN_START(_Flash28_API_RunStart),
     PAGE = 0

   These are used to copy the flash API from flash to SARAM

But in the Example_Flash2803x_API.c and Example_Flash28035_API.cmd, it indicates:

/******************************************************************/
// For Piccolo B, we dont need to copy the API from Flash as it is
// present in BOOT ROM
/******************************************************************/

It means that we don't need to include Flash API library and also don't need copy the Flash API to SARAM,

and the Flash_erase, Flash_program and Flash_verify functions will be executed in the BOOT ROM.

Any body can help to tell me, Is that right ?

Thanks for any comments.

over 15 years ago

0 Manoj Santha Mohan over 15 years ago

TI__Guru 55700 points

Johnson,

TMS320F2803x API is embedded into the Boot ROM on the device. This differs from other 28x devices where the API is loaded into RAM.

The comment which says,

is valid.

Please make sure to include the 2803x_FlashAPI_BootROMSymbols.lib symbol library in link order. Refer to Pg: 14 of Flash2803x_API_usingCCS3.3v_Readme.pdf which came along with the sprc907.zip

Yes, you are right, the Flash_erase, Flash_program and Flash_verify functions will be executed from BOOT ROM.

Regards,

Manoj Kumar

C2000 Applications Engneer

0 johnson lung over 15 years ago

Prodigy 30 points

Manoj Kumar,

It is clear for me now, the Flash API has implemented and work fined in my application.

For the new user would like to implemet the F2803x Flash API.

I suggest that the Flash2803x_API_usingCCS3.3v_Readme.pdf could added more information about the Flash API has embedded in the BOOT ROM, and the Flash API don't need copy to RAM.

Regards,

Johnson

0 Manoj Santha Mohan over 15 years ago in reply to johnson lung

TI__Guru 55700 points

Johnson,

It is good to know that the problem was resolved. :)

Please check the release notes of Flash2803x_API_usingCCS3.3v_Readme.pdf documentation. It mentions that the flash API is embedded into BOOT ROM and it also mentions that symbol library should be included in the application.

Regards,

Manoj

0 christophe dohen over 14 years ago in reply to Manoj Santha Mohan

Prodigy 130 points

Hi all,

I have a question as well about loader on TMS320F28035. From the documents I read, it is now really confused for me. As mentionned above, the Flash API is included in the BOOT ROM section of the F2803x microcontrollers.

I want to load my code using SCI communication. Then, how do I perform it?

Do I have to write my own API or use the one in the BOOT ROM?

I read the two main documents about it:

- Piccolo Boot ROM reference guide

- TMS320F2803x Flash API .pdf document

and I can't answer my own question.

If I have to use the one in the BOOT ROM, how do I erase the memory? Any commands? Any documents?

0 Manoj Santha Mohan over 14 years ago in reply to christophe dohen

TI__Guru 55700 points

Dohen,

Yes, the Flash API is actually included in BOOT ROM section for F2803x microcontrollers. You don't need to write your own API, you can actually use 2803x_FlashAPI_BootROMSymbols.lib library by including the library file in your project.

In addition to the two documents you referenced, you can also TMS320F2803x SDFlash JTAG Flash Programming Utilities document available in spectrum digital website.

Regards,Manoj

0 christophe dohen over 14 years ago in reply to Manoj Santha Mohan

Prodigy 130 points

Then, I don't really understand why I have to include the library above in my own project.

As far as I understand, when I compile my project, I get a COFF file and can generate an .a00 file or an .hex file as well by adding some commands in Project -> Build options. Then, I can send this file to controller via SCI communication. For me, the library is only used if I want to write my own API to invoke functions already implemented in the BOOT ROM sections, no?

0 christophe dohen over 14 years ago in reply to christophe dohen

Prodigy 130 points

Alos, it looks like SDFlash doesn't support the TMS320F28035 microcontroller

0 Manoj Santha Mohan over 14 years ago in reply to christophe dohen

TI__Guru 55700 points

Dohen,

The TMS320F2803x SDFlash JTAG Flash Programming tool cannot be used for programming the flash through SCI. You need to comeup with your own API to invoke flash API in boor rom.

Regards,

Manoj

0 Manoj Santha Mohan over 14 years ago in reply to christophe dohen

TI__Guru 55700 points

Dohen,

Also, I am not sure whether you have heard about codeskin C2Prog (it is freeware, available for download)

Link: http://www.codeskin.com/c2prog-download

Hope this helps.

Regards,

Manoj

0 Flavio Puhl56815 over 14 years ago in reply to Manoj Santha Mohan

Prodigy 60 points

People,

the c2prog from codeskin works fine. I tested it like this:

1. Load Example_Flash_28035 from control suit;

2. On Build Properties>Buid Steps>Post Build Steps add Intel-Hex file generation

3. Build project;

4. Under debug directory an *.hex file should appear;

5. Using C2prog, download the *.hex file on DSP using the SCI (try 9600 baudrate first). Do not forget to set TDO=0 / GPIO34=1 / TRTS=0 before donwload.

Ok, now:

1. I would like to create my own bootloader instead of using c2prog;

2. I now that I can download a *.bin instead a *.hex file using hyperterminal (SPRAAQ2);

Questions:

1. How can I generate a *.bin file using CCSv4???

0 green James over 14 years ago in reply to Manoj Santha Mohan

Prodigy 110 points

I can't find the on the sprc907.zip Internet, can you send me the file to my E-mail, akui1@163.com or 985534773@qq.com

Manoj Santha Mohan said:

Johnson,

TMS320F2803x API is embedded into the Boot ROM on the device. This differs from other 28x devices where the API is loaded into RAM.

The comment which says,

/******************************************************************/
// For Piccolo B, we dont need to copy the API from Flash as it is
// present in BOOT ROM
/******************************************************************/

is valid.

Please make sure to include the 2803x_FlashAPI_BootROMSymbols.lib symbol library in link order. Refer to Pg: 14 of Flash2803x_API_usingCCS3.3v_Readme.pdf which came along with the sprc907.zip

Yes, you are right, the Flash_erase, Flash_program and Flash_verify functions will be executed from BOOT ROM.

Regards,

Manoj Kumar

C2000 Applications Engneer

0 Manoj Santha Mohan over 14 years ago in reply to green James

TI__Guru 55700 points

James,

Sorry for replying so late.

Well, I am not sure whether you already received this file. If not, you can find it in this link below. Click Download as shown below.

http://www.ti.com/tool/sprc907

Regards,

Manoj

0 Jun Zhang4 over 12 years ago in reply to Manoj Santha Mohan

Prodigy 20 points

Hi Manoj,

I have a problem with flash programming on F28033. In my application, I want to re-programe the flash with RS232. If I connect a XDS100 to the chip and first program the

code with on-chip flash programmer plugin, then the application works well and I can do re-programming with RS232; however, if I disconnect the XDS100 and repeat the

steps, the application doesn't work. I trace it and find that there is a flash erase error #21. Can you provide some support? The re-programe code is ported from 280x and

works well. I have also read the Flash2803x_API_usingCCS3.3v_readme.pdf document and follow what it said on Page11 to Page14.

0 Jun Zhang4 over 12 years ago in reply to Jun Zhang4

Prodigy 20 points

The issue has been solved. The reason is in that when initializing the two variables Flash_CPUScaleFactor and Flash_CallbackPtr, EALLOW/EDIS missed.

But the code works well on F280x. Does anyone know what's the difference?

Thanks all the same.

0 Waldemar Weiss over 12 years ago in reply to Jun Zhang4

Prodigy 70 points

We want to link the Flash_API for (TMS320F28034-Prozessor) to our code, because we need an on-chip-EEPROM. We have the following Error-massage:

Error: Can’t open file Flash2803x_API_V100.lib for input

Please tell us what we have to correct in our software.

Here are the CMD- and the PRJ-File:

The CMD-file has the following context:

MEMORY

{

PAGE 0: /* Program Memory */

/* ZONE0 : origin = 0x002000, length = 0x002000 /* XINTF zone 0 / 8kW */

/* ZONE1 : origin = 0x004000, length = 0x002000 /* XINTF zone 1 / 8kW */

RAML0 : origin = 0x008000, length = 0x000800 /* on-chip RAM block L0 / 2kW */

RAML1 : origin = 0x008800, length = 0x000400 /* on-chip RAM block L1 / 1kW */

/* ZONE2 : origin = 0x080000, length = 0x080000 /* XINTF zone 2 / 500kW */

/* ZONE6 : origin = 0x100000, length = 0x080000 /* XINTF zone 6 / 500kW */

OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP / 1kW */

/* FLASHJ : origin = 0x3D8001, length = 0x001FFF /* on-chip FLASH / 8kW */

/* FLASHI : origin = 0x3DA000, length = 0x002000 /* on-chip FLASH / 8kW */

/* FLASHH : origin = 0x3DC000, length = 0x004000 /* on-chip FLASH / 16kW */

/* Zusammenlegung der Flash-Bereiche in eine Sektion FLASHD (PM>4kW) */

/* FLASHH : origin = 0x3E8000, length = 0x002000 /* on-chip FLASH / 8kW */

/* FLASHG : origin = 0x3EA000, length = 0x002000 /* on-chip FLASG / 8kW */

/* FLASHF : origin = 0x3EC000, length = 0x002000 /* on-chip FLASF / 8kW */

/* FLASHE : origin = 0x3EE000, length = 0x002000 /* on-chip FLASE / 8kW */

/* FLASHD : origin = 0x3F0000, length = 0x002000 /* on-chip FLASD / 8kW */

FLASHD : origin = 0x3E8001, length = 0x009FFF /* on-chip FLASD H-D/ 5*8kW */

FLASHC : origin = 0x3F2000, length = 0x002000 /* on-chip FLASC / 8kW */

FLASHB : origin = 0x3F4000, length = 0x002000 /* on-chip FLASB / 8kW */

FLASHA : origin = 0x3F6000, length = 0x001F7F /* on-chip FLASA / 8kW */

/* BEGIN : origin = 0x3F8000, length = 0x000002 /* Part of H0. Used for "boot to H0" bootloader mode. */

BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA */

/* PRAMH0 : origin = 0x3F9A00, length = 0x000600 /* portion of H0 we've mapped to PAGE 0 / 4kW */

/* ZONE7 : origin = 0x3FC000, length = 0x003FC0 /* XINTF zone 7 available if MP/MCn=1 */

/* ROM : origin = 0x3FF000, length = 0x000FC0 /* boot ROM available if MP/MCn=0 / 4kW */

RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */

VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */

CHKS : origin = 0x3E8000, length = 0x000001 /* Part of FLASHH (CHKS über das gesamte FLASH) */

/* unbedingt auf PAGE0 mappen!!! */

PAGE 1 : /* Data Memory */

RAMM0 : origin = 0x000040, length = 0x0003C0 /* on-chip RAM block M0 / 1kW */

RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 / 1kW */

DEV_EMU : origin = 0x000880, length = 0x000180 /* device emulation registers */

FLASH_REGS : origin = 0x000A80, length = 0x000060 /* FLASH registers */

CSM : origin = 0x000AE0, length = 0x000010 /* code security module registers */

XINTF : origin = 0x000B20, length = 0x000020 /* external interface registers */

CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 and Timer2 are reserved for BIOS)*/

PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control registers */

PIE_VECT : origin = 0x000D00, length = 0x000100 /* PIE vector table */

/* Zone0 aufgeteilt für ehem. I/O Speicher */

/* ZONE0_A : origin = 0x002000, length = 0x000800 /* XINTF zone 0 / 2kW */

/* ZONE0_B : origin = 0x002800, length = 0x000800 /* XINTF zone 0 / 2kW */

/* ZONE0_C : origin = 0x003000, length = 0x000800 /* XINTF zone 0 / 2kW */

/* ZONE0_D : origin = 0x003800, length = 0x000800 /* XINTF zone 0 / 2kW */

ECAN_A : origin = 0x006000, length = 0x000100 /* eCAN registers */

ECAN_AMBOX : origin = 0x006100, length = 0x000100 /* eCAN mailboxes */

SYSTEM : origin = 0x007010, length = 0x000020 /* System control registers */

SPI_A : origin = 0x007040, length = 0x000010 /* SPI registers */

SCI_A : origin = 0x007050, length = 0x000010 /* SCI-A registers */

XINTRUPT : origin = 0x007070, length = 0x000010 /* external interrupt registers */

GPIOMUX : origin = 0x0070C0, length = 0x000020 /* GPIO mux registers */

GPIODAT : origin = 0x0070E0, length = 0x000020 /* GPIO data registers */

ADC : origin = 0x007100, length = 0x000020 /* ADC registers */

EV_A : origin = 0x007400, length = 0x000040 /* Event Manager A registers */

EV_B : origin = 0x007500, length = 0x000040 /* Event Manager B registers */

SCI_B : origin = 0x007750, length = 0x000010 /* SCI-B registers */

MCBSP_A : origin = 0x007800, length = 0x000040 /* McBSP registers */

RAML2 : origin = 0x008C00, length = 0x000400 /* on-chip RAM block L2 / 1kW */

RAML3_1 : origin = 0x009000, length = 0x000800 /* on-chip RAM block L1 / 2kW */

RAML3_2 : origin = 0x009800, length = 0x000800 /* on-chip RAM block L2 / 2kW */

FLASHB : origin = 0x3F4000, length = 0x002000 /* on-chip FLASH / 8kW */

CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* CSM password locations in FLASHA */

SARAM_L0 : origin = 0x3f8000, length = 0x000800 /* on-chip 2kW */

}

SECTIONS

{

/*** Compiler Required Sections ***/

/* .text : > PRAMH0, PAGE = 0 */

/* .cinit : > PRAMH0, PAGE = 0 */

.text : > FLASHD, PAGE = 0

.cinit : > FLASHD, PAGE = 0

.reset : > RESET, PAGE = 0, TYPE = DSECT

.stack : > RAMM0, PAGE = 1

.bss : > RAML3_1, PAGE = 1 /*, fill = 0000h */

.ebss : > RAML3_1, PAGE = 1 /*, fill = 0000h */

/* .const : > RAML3, PAGE = 1 */

.const : load = FLASHD, PAGE=0, run = RAML3_1, PAGE=1

{

/* GET RUN ADDRESS */

__const_run = .;

/* MARK LOAD ADDRESS */

*(.c_mark)

/* ALLOCATE .const */

*(.const)

/* COMPUTE LENGTH */

__const_length = .- __const_run;

}

/* .econst : > RAML3_1, PAGE = 1 */

/* .econst : > FLASHB, PAGE = 1 */

.econst : load = FLASHD, PAGE=0, run = RAML3_1, PAGE=1

{

/* GET RUN ADDRESS */

__econst_run = .;

/* MARK LOAD ADDRESS */

*(.ec_mark)

/* ALLOCATE .econst */

*(.econst)

/* COMPUTE LENGTH */

__econst_length = .- __econst_run;

}

.sysmem : > RAML3_1, PAGE = 1

/*** User Defined Sections ***/

/* Checksumme MUSS auf PAGE0 stehen, sonst geht SCI-Bootload auf dieser Sektion schief */

pmachks : > CHKS, PAGE = 0

/* Umkopieren der Routine zum Konfigurieren des FLASH */

secureRamFuncs : LOAD = FLASHD, PAGE = 0

RUN = RAML0, PAGE = 0

RUN_START(_secureRamFuncs_runstart),

LOAD_START(_secureRamFuncs_loadstart),

LOAD_END(_secureRamFuncs_loadend)

ramfuncs:

{

Flash2803x_API_V100.lib(.econst)

Flash2803x_API_V100.lib(.text)

} LOAD = FLASHB,

RUN = RAML0,

LOAD_START(_RamfuncsLoadStart),

LOAD_END(_RamfuncsLoadEnd),

RUN_START(_RamfuncsRunStart),

PAGE = 0

/* codestart muß an Adr. 3F8000h stehen (in Bootmode H0SRAM) */

codestart : > BEGIN, PAGE = 0 /* Used by file DSP28_CodeStartBranch.asm */

/* Tabelle muß zur Laufzeit im High-64k stehen */

tan_table : > FLASHC, PAGE = 0 /* Arctan / Geberauswertung */

sin_table : > FLASHC, PAGE = 0 /* Sin / Transformationen */

sqr_table : > FLASHC, PAGE = 0 /* Wurzeltabelle */

sign_table : > FLASHC, PAGE = 0 /* Signaltabelle Geberqualität */

/*==========================================================*/

/* Tables for IQ math functions: */

/*==========================================================*/

/* For K1 device (no tables in boot ROM), use this: */

IQmathTables : load = FLASHC, PAGE = 0

/* For F2810/12 devices (with tables in Boot ROM) use this: */

IQmathTables : load = BOOTROM, type = NOLOAD, PAGE = 0

/*==========================================================*/

/* IQ math functions: */

/*==========================================================*/

/* IQmath : load = PRAMH0, PAGE = 0 */

IQmath : load = FLASHC, PAGE = 0

/* Flash2803x_API_V100 : load = FLASHB, PAGE = 0 */

/* Flash28_API : load = FLASHB, PAGE = 0 */

/* alte ASM-Routinen müssen im High-64k stehen */

upper64k : > FLASHC, PAGE = 0

/* Vars auf page_4/5/7 müssen im Low-64k stehen mit Anfang auf 128-Wort-Grenze */

page_4 : load = 0x0200, align 128, PAGE = 1 /*RAMM0 */ /* Buffer Sprungantwort */

page_5 : load = 0x0280, align 128, PAGE = 1 /*RAMM0 */ /* frei */

page_6 : load = 0x0300, align 128, PAGE = 1 /*RAMM0 */ /* frei */

page_7 : load = 0x0380, align 128, PAGE = 1 /*RAMM0 */ /* frei */

/* Externer Speicher (ehemals I/O) */

/* Test Simreg!!! dpr : > DRAMH0 /* 2K DPRAM */

/* dpr : > ZONE0_A /* 2K DPRAM */

dpr : > RAMM1 /* 1K DPRAM */

/* tlc7225 : > ZONE0_B */ /* 4-Kanal-8-Bit-DAC */

/* pwm : > ZONE0_C PWM-FPGA */

/*io_port : > ZONE0_D /* I/O-Ports */

io_port : > RAML2 /* I/O-Ports jetzt nur im RAM!! */

/*** Peripheral Frame 0 Register Structures ***/

DevEmuRegsFile : > DEV_EMU, PAGE = 1

FlashRegsFile : > FLASH_REGS, PAGE = 1

CsmRegsFile : > CSM, PAGE = 1

XintfRegsFile : > XINTF, PAGE = 1

CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1

PieCtrlRegsFile : > PIE_CTRL, PAGE = 1

PieVectTable : > PIE_VECT, PAGE = 1

/*** Peripheral Frame 1 Register Structures ***/

SysCtrlRegsFile : > SYSTEM, PAGE = 1

SpiaRegsFile : > SPI_A, PAGE = 1

SciaRegsFile : > SCI_A, PAGE = 1

XIntruptRegsFile : > XINTRUPT, PAGE = 1

GpioMuxRegsFile : > GPIOMUX, PAGE = 1

GpioDataRegsFile : > GPIODAT PAGE = 1

AdcRegs : > ADC, PAGE = 1

EvaRegsFile : > EV_A, PAGE = 1

EvbRegsFile : > EV_B, PAGE = 1

ScibRegsFile : > SCI_B, PAGE = 1

McbspaRegsFile : > MCBSP_A, PAGE = 1

/*** Peripheral Frame 2 Register Structures ***/

ECanaRegsFile : > ECAN_A, PAGE = 1

ECanaMboxesFile : > ECAN_AMBOX PAGE = 1

/*** Code Security Password Locations ***/

CsmPwlFile : > CSM_PWL, PAGE = 1

}

The PRJ-file has the following context:

; Code Composer Project File, Version 2.0 (do not modify or remove this line)

[Project Settings]

ProjectDir="C:\Acservo\KLINGELN\VME_AC_Regelelektronik_2v0\"

ProjectType=Executable

CPUFamily=TMS320C28XX

Tool="Compiler"

Tool="DspBiosBuilder"

Tool="Linker"

Config="Debug"

Config="Release"

[Source Files]

Source=".\lib\rts2800_ml.lib"

Source=".\src\Adc.c"

Source=".\src\CodeStartBranch.asm"

Source=".\src\DefaultIsr.c"

Source=".\src\Dflash.c"

Source=".\src\Evm.c"

Source=".\src\Flash.c"

Source=".\src\GlobalVariableDefs.c"

Source=".\src\Gpio.c"

Source=".\src\Init.c"

Source=".\src\main.c"

Source=".\src\Mmio.asm"

Source=".\src\Parcon.c"

Source=".\src\PieCtrl.c"

Source=".\src\PieVect.c"

Source=".\src\Sci.c"

Source=".\src\SysCtrl.c"

Source=".\src\Ueberw.c"

Source=".\src\Uprogs.asm"

Source=".\src\Xintf.c"

Source=".\src\XIntrupt.c"

;Source="lib\2803x_FlashAPI_BootROMSymbols.lib"

Source=".\lib\Flash2803x_API_V100.lib"

Source=".\lib\IQmath.lib"

Source=".\src\ascii.c"

Source=".\src\Chksum.asm"

Source=".\src\CPLD.c"

Source=".\src\Dac_MCP4822.c"

Source=".\src\DPRAM.C"

Source=".\src\DSP2803x_usDelay.asm"

Source=".\src\EPwmUpDownAQ.c"

Source=".\src\Geber.c"

Source=".\src\ireg.c"

Source=".\src\nreg.c"

Source=".\src\Optlauf.c"

Source=".\src\f2812.cmd"

["Compiler" Settings: "Debug"]

Options=-g -k -q -ss -al -as -fr"..\obj" -fs"..\lst" -i"..\include" -d"_DEBUG" -d"LARGE_MODEL" -ml -v28

["Compiler" Settings: "Release"]

Options=-q -o3 -fr"..\Release" -d"LARGE_MODEL" -ml -v28

["DspBiosBuilder" Settings: "Debug"]

Options=-v28

["DspBiosBuilder" Settings: "Release"]

Options=-v28

["Linker" Settings: "Debug"]

Options=-q -c -m"VME_AC_Regelelektronik.map" -o"VME_AC_Regelelektronik.out" -stack0x1C0 -x

;"$(Proj_dir)\..\lib" -l"Flash2803x_API_V100.lib"

["Linker" Settings: "Release"]

Options=-q -c -o".\Release\VME_AC_Regelelektronik.out" -x

[".\src\Uprogs.asm" Settings: "Debug"]

Options="Compiler" +{-m20}