Hello,
The function provided by TI to initialize the flash bank and pump runs the following operations:
//
// At reset bank and pump are in sleep. A Flash access will power up the
// bank and pump automatically.
//
// After a Flash access, bank and pump go to low power mode (configurable
// in FBFALLBACK/FPAC1 registers) if there is no further access to flash.
//
// Power up Flash bank and pump. This also sets the fall back mode of
// flash and pump as active.
//
Flash0CtrlRegs.FPAC1.bit.PMPPWR = 0x1;
Flash0CtrlRegs.FBFALLBACK.bit.BNKPWR0 = 0x3;
I'm trying to understand what this snipped does exactly, based on the TRM chapter 2.12.6 Flash and OTP Power-Down Modes and Wakeup.
- The first sentence in the comment above states that a flash access will power up the bank and pump automatically. No problem, this is exactly what the TRM states.
- The second sentence states that after a flash access they go back to low power mode. As far as I understand, this is only true after you perform all 10 steps of the power-down sequence described in the TRM, so unless I perform this sequence the bank and pump will not go back to low-power mode when there is no access to flash. Can someone confirm that my understanding is correct? I wouldn't want the flash bank to automatically go back to sleep every time the CPU enters a part of my code which is run from RAM.
- The third sentence does not make sense to me. If the power up is automatic then why on earth does our code need to do anything? In the TRM the description of the FBFALLBACK register says that "If the bank and pump are not in active mode and an access is made, the value of this register is automatically changed to active".
So are these two lines really necessary and if they are, why?
Cheers,
Pierre