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CCS/LAUNCHXL-F280049C: Download RAM + FLASH or RAM only

Part Number: LAUNCHXL-F280049C
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Dear Team,

My code is too large to run only in RAM so I want to split the code with the debugged functions or libraries in Flash and the not debugged code in RAM. 

  1. With the previous version (6.2) , I could choose to download RAM + FLASH or RAM only
    → this option seems to be removed in the new version (8.3). Can you confirm that? 
  2. I implement the .cinit section in RAMM0. During the program download, the .cinit table seems to be correctly loaded BUT then when the flash is programmed, the RAMM0 is altered and the .cinit table is no more valid at the end of the operation.
    I tried the option BACKUP RAM during Flash programing but there is no change.

Do you have any recommendations on how to handle this? 

Thanks,
Nico 

  • Nicolas,

    If you are looking to split code sections across RAM sections, I will recommend you follow the steps detailed at: processors.wiki.ti.com/.../C28x_Compiler_-_Understanding_Linking

    Can you elaborate the error mentioned in step 1. I'm not sure what has changed in CCS versions that would affect your project. Are you working on C2000Ware examples?

    Regards,
    Ozino
  • Hi Ozio,

    Yes I use a piece of the C2000 WARE but it’s my own project (not based on the examples).

    For the linker: I use the CMD file from C2000 Ware (28004X_generic_ram.cmd) associated to another CMD file to switch some pieces of the code in Flash (Additional_commands_RAM.cmd)

    Here in attachment you’ll find the MAP file for more details.

    The goal of this configuration is:

    1. Debugged code loaded in FLASH
    2. Under debug function in RAM
    3. .CINIT in RAM due to possible changes during debug

    This is interesting when I’m able to download program only in RAM, download in FLASH when new debugged functions are switched in the Flash memory.

    By this mean, I can gain time because I avoid to erase and program the FLASH memory.

    When I work fully in FLASH, I found out also I’ve to set the option “Combine Sections during Program Load to increase performance”.

    Otherwise the .text is split in several parts and there is an error regarding the non-blank memory.

    Here some code used:

    in Additional_commands_RAM.cmd

    SECTIONS
    {
       SINTBL                 : >>RAMM0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4,   PAGE = 0
       dclfuncs         : >> RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4,   PAGE = 0
     
       DataLogSection   : >> RAMLS5 | RAMLS6 | RAMLS7,         PAGE = 1       align(2)
     
     
     
       /* Allocate IQ math areas: */
       IQmath           : > RAMLS0,     PAGE = 0            /* Math Code */
       IQmathTables     : > FLASH_BANK0_SEC0, PAGE = 0
     
       FLASHlibrary : {
            *rts2800_fpu32.lib (.text)
            *SYS_ml.lib <f28004x_gpio.obj, f28004x_sysctrl.obj, device.obj>  (.text)
       } >> FLASH_BANK0_SEC0 | FLASH_BANK0_SEC1 | FLASH_BANK0_SEC3, PAGE = 0
    }

    Looking forward to your feedback.

    Best Regards,

    Nico 

  • Nico,

    Please do not post the entire contents of a file as a code snippets in a forum post. This cluttters the post and makes it difficult to read through. Instead, upload a file link or wait for the post owner to request the information.

    Regards,
    Ozino
  • Nico,

    Have you considered using the F28004x_generic_flash.cmd as a starting point. That file is already configured for a flash application.

    Please have the customer consult the app note on running from internal flash: www.ti.com/.../spra958l.pdf

    I suspect some steps are missing regarding running certain section from RAM (section 4).

    Regards,
    Ozino