IN TIDUCT9 document related to the 2 Phase Interleaved LLC Design Guide, Table 2 of key signals last row contains
vin Input voltage feedback ADC-C0
Connector pin 26 of J3 for all I/O signals, shows "vin_fb" as seen in TIDM101. Is it the same signal as "vin", clealry scaled etc...
I cannot find ADC-C0 anywhere in the documents nor in the processor pinout or in any list of ADC.
Is this a typo?
Is there a more recent document? We are using this design as a baseline design of our own LLC. Wpould appreciate any comments on this or correction.
thnx
robin
