TMS320F28033: SPISTEA goes high during SPI transmit

Howard Zou

Genius 12365 points

Part Number: TMS320F28033

Hi,

my customer is using F28033's SPI to communicate with MCP2515.

F28033 is master, SPISTEA connect to CS pin of MCP2515. baud rate is 2M. Customer transmit 3 8-bit data successively.

The good waveform is as below: green-clock, blue-CS pin.

99% the communication is good, but there is low probability that the waveform is as below:

The clock stops in the middle, and CS pin goes high as shown below:

We've no idea why it's like this, any idea?

over 3 years ago

0 Gus Martinez over 3 years ago

TI__Mastermind 25311 points

Hi Howard,

I'm assuming the SPI FIFO is enabled and that the character length is set to 8-bits. In this configuration, the SPISTEA will stay active (low) until all the characters in the FIFO are transmitted (see post below). The "bad" waveform seem to indicate the FIFO doesn't have any more characters to transmit after the first character is shifted out. Is the CPU writing characters to the SPI FIFO for transmit? Could it be that the CPU is getting interrupted in the middle of this activity?

https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/688266/2536345?tisearch=e2e-sitesearch&keymatch=spiste%252525252525252520gpio#2536345

0 Howard Zou over 3 years ago in reply to Gus Martinez

TI__Genius 12365 points

Gus,

Thank you, we find that it's exactly what you desribed.

CPU write data to SPI FIFO in the while loop in main(), and it may be interrupted by an ISR.

How do you suggest to prevent such small probability issue?

0 Gus Martinez over 3 years ago in reply to Howard Zou

TI__Mastermind 25311 points

Howard,

You could disable interrupts while the CPU takes care of the SPI FIFO writes. The downside is that you could delay processing of some time-critical interrupt. Another option is to configure the SPISTEA pin as GPIO and have the CPU control it directly.

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMS320F28033: SPISTEA goes high during SPI transmit