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TMS320F28377D-EP: Sampling rate of ADC 16-bit mode

Genius 5365 points
Part Number: TMS320F28377D-EP
Other Parts Discussed in Thread: TMS320F28377D


I looked at the datasheet of TMS320F28377D. This datasheet have the following information.(P.1)

ADC 16-bit Mode
- 1.1 MSPS Each (up to 4.4-MSPS System Throughput)
- Differential Inputs
- Up to 12 External Channels

I would like to know how the 1.1 MSPS works.
In other words, S+H phase and conversion phase are about 910ns.(1.1MSPS)

I checked the user's guide. S+H and conversion time are following.

S+H time : (ACQPS + 1) * SYSCLK cycles time
Conversion time: 29.5 ADCCLK cycles time

Please tell me the detail of 1.1MSPS?

S+H time: xxx ns
Conversion time : xxx ns
Could you tell me how to calculate it?


  • Rei,

    From the datasheet, the fastest supported ADCCLK frequency is 50-MHz and the shortest ACQPS window is 320-ns:

    Further, the total processing time for an ADC conversion is tSH + tEOC:

    So looking in the handy timing table for 200-MHz SYSCLK / 4 for 50-MHz ADCCLK:

    We can see that tEOC would be 119 x 5-ns SYSCLK = 595-ns.

    So tSH + tEOC = 320-ns + 595-ns = 915-ns; so 1.09-MSPS -> rounded to 1.1-MSPS.


  • Thank you very much!