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Original question:

TMS320F28379D: Strange GPIO behavior in TMS320F28379D

TMS320F28379D: RAM DEBUF BUILD Configuration

Takayuki Miyazaki
Genius 10120 points
Part Number: TMS320F28379D


Hi Experts,

Customer is making the firmware which based on blinky_dc_cpu01 project under RAM_DEBUG build configuration. Recently, customer encountered Memory size issue. According to the following view, RAM0 and RAMLS0 was used, however RAMS1-RAMS4 are not used. I mean, they suppose they are able to use those RAM memories. Regarding "2837xD_RAM_lnk_cpu1.cmd" and "F2837xD_Headers_nonBIOS_cpu1.cmd" files, customer did not modify them. If customer should modify those cmd-files, could you elaborate how to fix them, please?

Also, I’m able to share this test-project offline, if you need it, please let me know.

And then, if you will share the helpful document which explains those memories, it would be appreciated.

Best regards,

Miyazaki

  • 0
    TI__Mastermind 32655 points

    Hi Miyazaki,

    This occurs because linker is unable to split the .text section (of size 0x171d) into smaller subsections and allocate to different RAM sections. By default, the linker can split .text at file level, which means, if you have 2 .c files, the text from file1.obj and file2.obj will be treated as separate subsections, and one can be allocated to LS0 and one can be allocated to LS1. All functions in file1.c will reside in one subsection and file2.c will reside in another subsection

    There is an option in the compiler properties to place each function in separate subsection, --gen_func_subsections. This is available in Project properties->C2000 Compiler->Advanced Options->Runtime Model Options. If it is not enabled, please enable it so linker can split the .text into smaller subsections and distribute it across multiple LSRAM memories.

    Regards,

    Veena

  • 0 in reply to Veena Kamath
    TI__Mastermind 32655 points

    Hi Miyazaki,

    Another option is to combine LSRAMs to form bigger memory blocks.

    //RAMLS0 : origin = 0x00008000, length = 0x00000800
    //RAMLS1 : origin = 0x00008800, length = 0x00000800
    //RAMLS2 : origin = 0x00009000, length = 0x00000800
    //RAMLS3 : origin = 0x00009800, length = 0x00000800
    RAMLS0123 : origin = 0x00008000, length = 0x00002000

    .text :> RAMLS0123 

    Regards,

    Veena

  • 0 in reply to Veena Kamath
    TI__Genius 10120 points

    Hello Veena,

    Thank you for your kind supporting. I confirmed this issue was fixed with "Runtime Model Options". I shared this information with our customer, I'd like to wait their feedback for a while.

    best regards,

    Miyazaki

  • 0 in reply to Veena Kamath
    TI__Genius 10120 points

    Hello Veena,

    Customer also confirmed this issue was resolved.

    I appreciate your help.

    Best regards,

    Miyazaki