TMS320F28388D: How to change CLB duration in Sysconfig

Hi, 

1. Is it possible to set simulation duration to 50us or more from Sysconfig of CCS?

　If possible, please tell me the specific procedure.

2. I have a question about how to configure CLB.

　My configuration  is that set COUNTER behind FSM and the output of COUNTER returns to FSM.

　FSM → COUNTER → FSM

　Is there any problem with this configuration method?

　Please let me know if there are any restrictions such as must set the LUT behind the output of COUNTER.

3. I want to implement a function to output delayed output with respect to input in CLB.

　The design is simulated with the following blocks.

　The simulation results are as follows.

　The result of the simulation and the actual operation are different.

　I want CLB to always output with the same deviation, but there is a phenomenon that some waveforms are missing.

　Please tell me how to eliminate this phenomenon.

Thanks,

Koki