TMS320F280049: ADC accuracy, input limits, reference voltage, input range, and more

Hi Lenio,

I'm currently getting information on your inquiies above. I'll get back with you as soon as I can.

Regards,
Joseph

Hi Lenio,

Please find my answers embedded below:

1. Do the ADC inputs have any type of clamping structure?

a. If so, to what voltage is it clamped to? (VDDA, VREFHI, other?)
JC: Yes there is a clamping structure and it is clamped to VDDA.

b. F280049 datasheet Table 5-43, note 1 states that load current on VREFHI increases when ADC input is greater than VDDA. Could you
explain or show an equivalent circuit for this?
JC: The VREFHI pin is internally buffered with circuits connected to VDDA. Any ADC input that is greater than VDDA may start going into clamp and would introduce more leakage current to VDDA and this change may be enough to disturb the buffer for VREFHI, which in turn will affect the conversion results.

2. Per datasheet, there is a warning to keep ADC inputs below Vdda +0.3 V. If the ADC inputs have a source impedance to limit the current into the clamp, is there an acceptable range of input current that will not upset the ADC, or associated ADC channels?
JC: Typical ADC pin leakage is ~2uA. With ADC input voltages in the region of VDDA + 0.3V or greater, this leakage current would start increasing exponentially. You would want to ensure the the ADC input pin leakage will not exceed 2uA.

3. Why do they state that when using the ADC at a range of 0-3.3V the ADC will have reduced accuracy / precision?
JC: Sorry, i do not seem to have noted that in the device spec. Can you let me know which section in the datasheet this was stated?

4. When using the internal 3.3V ADC reference, what conversion results do you get when the ADC power rail is less than 3.3V but above the 3.3V reset (Micro continues to operate)? Will ADC results be adversely affected?
JC: In 3.3V internal VREF mode, the internal voltage reference bandgap is supplying an accurate voltage of 3.3V/2 or 1.65V (which can be measured externally at the VREFHI pin) so VDDA value of 3.3V - 10% would still produce accurate conversions per spec. Not sure about your comment "...but above the 3.3V reset". Can you elaborate on this?

5. When using an external ADC reference:

a. Would I need to individually buffer each of the 3 VREFHI inputs (shown in ref manual below), or could all of these be tied together when
using the REF3430?
JC: Ideally, you would want to buffer each VREFHI input. What we have seen with characterization is that unbuffered connection of VREFHI tied together and supplied from a single REF50xx would be sufficient to meet the DC spec (INL and DNL) but the AC spec (SNR/ENOB) would start to degrade. If buffered separately to the 3 VREFHI pins, a single reference IC (REF50xx) is sufficient to provide accurate references that can satisfy both DC and AC specs of the ADC. It does seem like REF3430 has a built in buffer. We have not evaluated that with the F280049 but it would be interesting to see how ADC DC/AC specs perform with this buffered reference.

b. How would this affect the use of the Device_cal{} function for ADC trim registers? Can they still be used?
JC: You should still be able to use the Device_cal function regardless when using external/internal VREF.

c. How would using an external reference affect the post processing block for Offset Correction? Any issues?
JC: The PPB offset is independent of the VREF mode (internal or external). Note that the PPB offset is a value that is provided by the
user. It is not automatically populated as an offset number. It is intended to be used in systems where a user can determine the value
of an offset that is systematically inherent in the system. Once this offset is determined, the PPB can be used as a real time compensation for the converted value if the PPB offset is programmed without the user having to manually remove the offset from the converted results.

d. If Device)cal() function is not used, is there intentional offset or deviation from ideal gain seen in the ADC channels?
JC: Device cal only corrects for the offset, there is no compensation for gain on the F280049 device.

e. When using Device_cal() or PPB offset correction, these only affect the raw ADC values, and cannot be used at the system scaling
level, correct? (like module scaled voltage 0 to 48V, current 0 to 10A, etc).
JC: Yes, that is correct.

f. If I want to achieve the largest ADC input range same as the F2837x, I would use an external reference of 3.0V, correct?
JC: I think you would want to use the external 3.3V ref on the F280049 for the largest ADC range.


Best regards,
Joseph

Hi Joseph,

thank you so much for the thorough reply.

#4 is answered - thank you!

#3 - please review the following document, page 11 (apologies for not referencing it in the original post)