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TMS570LS2125 Watchdog

I ran in to a situation today where the watchdog RTIDWDKEY register was being written to before the watchdog was configured an enabled.

Even though the correct patterns were written in the correct order, the processor was being reset on the write of the second pattern.

Can anyone tell me if this is a known issue? I did not see any warnings in the reference manual or the silicon errata.

Thanks.

  • Hello,

    This behavior is expected as per the design implementation, though not completely intuitive and certainly not clearly documented. We will include this restriction in the next update of the TRM. Essentially the behavior comes from the fact that the windowed watchdog also checks for a violation of the start of the service "window".

    The DWDCTRL register is only used to enable the watchdog down counter.

    Regards, Sunil