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Linux/RM48L952: How to compile and link HALCoGen gcc-files with GNU-ARM-Toolchain?

Richard Huber67
Prodigy 60 points
Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Linux

Hope this is the right place to post.

I want to create a setup for the Hercules RM48L952 MCU DevBoard on Linux(a Debian32Bit-Box) using the GNU-ARM toolchain with newlib (gcc-arm-none-eabi-5_4-2016q3 , from developer.arm.com/.../downloads ) , HALCoGen 04.06.00 (Project-Settings: RM48L952ZWT ; gcc toolchain) and a Lauterbach Power Debug Interface with a JTAG-CORTEX-A/R cable.

When I compile and link (with -Tsys_link.ld) the generated HALCoGen files to an elf-file and load it onto the hardware (with trace32 using data.load.elf), the entry point _c_int00 is correct. However, stepping forward  does not even come to the first function _coreInitRegisters_() in _c_int00() (from sys_startup.c). Leading to a not working startup-routine with no access to the main().

So, my question is:

How should the HALCoGen gcc-files for RM48L952ZWT target be compiled and linked to create a working executable? (Independently from the chosen Debugger to load it onto the board.)

Here is a compile/link example of mine:

arm-none-eabi-gcc -v -fno-use-linker-plugin --verbose --specs=nosys.specs -Wl,--print-map -Wl,--cref -mlittle-endian -march=armv7-r -mfloat-abi=hard -mfpu=vfpv3-d16 -o all_test_arm_elf_gcc.elf -Wl,--start-group -T./startup_RM48L952-ZWT/source/sys_link.ld ./sys_main.o ./startup_RM48L952-ZWT/source/*.S -I./startup_RM48L952-ZWT/include ./startup_RM48L952-ZWT/source/*.o -Wl,--end-group

I know this is probably wrong. A correction with the proper compiler options and linking options would be greatly appreciated.

(As stated above, this is just about the HALCoGen files. For starters I only want to make it to the empty main().)

Also, if what I ask is not possible :

How does the setup from the below mentioned question (RM48x + HalcoGen +Code Composer Studio + GCC toolchain) work? 

A short, but detailed guide on how to install and generate executable or where to find such a guide would be greatly appreciated.

Thanks in advance.


  • 0
    TI__Guru**** 186196 points
    Hello Richard,

    I have forwarded your question to our HAlCoGen expert.

    Regards,
    QJ
  • 0 in reply to QJ Wang
    TI__Guru**** 186196 points

    Below are the steps to compile the HAlCoGen generated GCC project:

    1. Import the HAlCoGen project into CCS6.x

    2. Right-click on the project explorer view and go to properties

    3. Change the compiler version to GNU v4.9.3 (Linaro)

    4. Add the include paths

    5. Compile

    Regards,

    QJ

  • 0 in reply to QJ Wang
    Prodigy 60 points

    Thank you for the short instructions. I will look into it.


  • 0 in reply to QJ Wang
    Prodigy 60 points
    An additional answer from the HALCoGen expert would be appreciated.
  • 0 in reply to Richard Huber67
    TI__Genius 14205 points

    Hi Richard,

    Are you expecting anything particular from HALCoGen? QJ and the other Forum link in your post is good reference. 

  • 0 in reply to Prathap
    Prodigy 60 points

    Sorry for the late reply. 

    So I looked into the CCS + Halcogen Toolchain + GCC + RM48 Toolchain.

    Turns out even with additional Flags (from earlier posts) it won't work.

    Lauterbach Debugger let's step to: 

     /* Work Around for Errata DEVICE#140: ( Only on Rev A silicon) 

    if (DEVICE_ID_REV == 0x802AAD05U)
        mrcmi p15,0x4,r5,c1,c10,0x6
        undef 0xF9E08EF8 -> Reroutes to undef interrupt and not out of it.
        strvsb r9,[r11],#-0xA85
        bicge r5,r12,r9,lsl #0x6
        smlabbvc r0,r0,pc,r0
        mvnseq r0,#-0x51000000 ; r0,#-1358954496

    Also  I noticed nERROR LED on when I connect Lauterbach-JTAG to board.

    (For connecting Lauterbach to the board I folowed Lauterbach debugger_arm.pdf instructions.)

    S4 Reset-Button turns LED off. When giving a "Sys.Up" with Lauterbach nERROR LED turns on again.

     

    Is there any configuration solution I can do in Halcogen or do I need to order a new board?

  • 0 in reply to Richard Huber67
    TI__Expert 6985 points
    Richard,

    for me the code looks like Thumb2 code which the CPU tries to execute in ARM state.
    Can you please check in which state the CPU is (CPSR T Bit), which instruction set the Lauterbach is disassembling and for which instruction set you are compiling the startup code (should be ARM).

    Best Regards,
    Christian
  • 0 in reply to Richard Huber67
    TI__Genius 14205 points
    Hi Richard,
    Is the issue resolved? I can help if you Share the CCS project files. Especially the compiler/linker options you used for the project.
  • 0 in reply to Prathap
    Prodigy 60 points

    Hi Prathap,

    unfortunately not.

    It's a very simple CCS-project. Only imported generated files by HALCoGen 04.06.00 for RM48L952ZWT and GCC toolchain as options. Added include path and that's it.

    Btw, I checked the Debugger configuration after previous post. It is definetly loaded with arm assembler (see screenshot Debugger configuration).

    To be honest I am at a bliss, as to what is the cause of this behaviour. I only want to step through startup routine to empty sys_main.

    Below you can find the whole package of information I can give:

    -my general properties, compiler flagsand  linker flags

    -my Test_GCC project zipped (including HALCoGen sources)

    -TRACE32  screen after loading elf onto target

    -TRACE32 screen with line that cannot be executed single step

    -TRACE32 screen after setting main break point and execute elf (go)-> landed at undef interrupt

    -TRACE32 debugger configuration

    -debugger_arm.pdf from Lauterbach for Debugger options  (just Search options with "Ctrl+F" for detailed information)

    3823.CodeComposerStudio_Projects.7z

  • 0 in reply to Richard Huber67
    TI__Expert 6985 points
    Richard,

    I loaded the OUT file from your CCS project (7z) with an XDS200 in CCS and it works.
    Here is what CCS is showing as disassembly for _c_init00:

    101 _coreInitRegisters_();
    _c_int00():
    0001412c: EBFFE9BE bl #0xe82c
    107 _coreInitStackPointer_();
    00014130: EBFFEA00 bl #0xe938
    118 if (DEVICE_ID_REV == 0x802AAD05U)
    00014134: E3E0300F mvn r3, #0xf
    00014138: E5932000 ldr r2, [r3]
    0001413c: E30A3D05 movw r3, #0xad05
    00014140: E348302A movt r3, #0x802a
    00014144: E1520003 cmp r2, r3
    00014148: 1A000000 bne #0x14150
    120 _esmCcmErrorsClear_();
    0001414c: EBFFEA5D bl #0xeac8

    This is about the code I would expect to see and totally different from that Lauterbach is showing.

    Best Regards,
    Christian
  • 0 in reply to Christian Herget
    Prodigy 60 points
    Hello Christian,

    ok! I tested my project to see if could reconstruct your code snippet but, failed.

    It really seems Lauterbach does load/interpret the code wrong.

    As for a new debugger:
    At the moment I only have a XDS560v2 Debugger. Could that also work?

    Best Regards,
    Richard
  • 0 in reply to Richard Huber67
    TI__Expert 6985 points

    Richard,

    Yes, the XDS560v2 should work for JTAG debugging, it will not support the ETM (Trace) as implemented on Cortex-R4F.
    Last time (mid last year) I used Lauterbach I had no major issues with it, just usability. I used the Flash Tool they supply as part of the standard installation. I think it was a script which had to be loaded separately, or was there some kind of example configuration, not sure anymore.a

    I forgot to mention that I'm a Windows user, so all tests were done using Windows as OS not Linux.


    Best Regards,
    Christian