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TMS570LS0232: Attempting to understand the MibADC calibration scheme

Part Number: TMS570LS0232
Other Parts Discussed in Thread: HALCOGEN

I have been studying the calibration and offset error correction sequences by reviewing section 16 of the SPNU0603A technical reference manual for the TMS570LS0232, and the available documentation has raised quite a few questions:

(1)  Where do I find the formula for the calculated 2s complement error correction value to load into the ADCALR register (per section 16.7.1.2)?

(2)  From what I can tell, this is only an offset calibration value, and there is no practical way to calculate and compensate for gain error.  Is this correct?

(3)  Section 16.7.1 describes 'conversion of an embedded calibration reference voltage', but figures 16-11 and 16-13 indicate that the reference voltage used is ADREFHI / ADREFLO.  This is a shared pin on the TMS570LS0232 with VCCAD and VSSAD.  Does this mean that this IC does not have an internal reference, and hence calibration capability is limited?

(4)  Am I correct is saying that even with offset error calibration, we're only really improving the offset error from +/-4LSB to +/-2LSB across the full operating temperature range in 12 bit mode?

(5) Am I also correct in stating that the differential non-linearity error is only improved from +/-7 LSBs to +/-4LSBs across the full operating temperature range in 12 bit mode when offset error calibration is employed.

(6) Once you have computed the midpoint value, D(cal), as shown in figure 16-12 of the TMS570LS0232 technical reference manual, how are you supposed to use that number?  Is it indicative of a linearity error term (i.e. curved instead of straight) or a slope error term (i,e, error will be twice as far from ideal at maximum input voltage).

(7) If the offset error is negative, do you need to calibrate only using reference values > 0.  In other words, don't use VRefLo on its own (Bridge_en=1, HILO=0) if it is connected to Vss, since the actual offset could be as low as -4.  This will return an ADC result of 0 resulting in an erroneous offset calculation?

Thanks

Jeff Cranmer

  • Hello Jeff,

    Hopefully I can help provide some answers for you.

    Jeffrey Cranmer said:
    (1)  Where do I find the formula for the calculated 2s complement error correction value to load into the ADCALR register (per section 16.7.1.2)?

    2's complement is a standard operation on a binary number. In this case we are dealing with a 12 bit value so lets say the offset comes to 1 ADC count or 0b000000000001. The 2's compliment is the invertion of all the bits in the value then add 1. Or the following:

    Correction Value (VAL) = 0x001 or 0b000000000001

    ~VAL = 0b111111111110 or 0xFFE

    2's compliment = ~VAL+1 or 0b111111111111 or 0xFFF

    Jeffrey Cranmer said:
    2)  From what I can tell, this is only an offset calibration value, and there is no practical way to calculate and compensate for gain error.  Is this correct?

    This is correct.

    Jeffrey Cranmer said:
    (3)  Section 16.7.1 describes 'conversion of an embedded calibration reference voltage', but figures 16-11 and 16-13 indicate that the reference voltage used is ADREFHI / ADREFLO.  This is a shared pin on the TMS570LS0232 with VCCAD and VSSAD.  Does this mean that this IC does not have an internal reference, and hence calibration capability is limited?

    The reference is provided from the external pin. You are correct that there is no internal reference voltage. Yes there are limitations to the degree to which the calibration can be effective.

    Jeffrey Cranmer said:

    (4)  Am I correct is saying that even with offset error calibration, we're only really improving the offset error from +/-4LSB to +/-2LSB across the full operating temperature range in 12 bit mode?

    (5) Am I also correct in stating that the differential non-linearity error is only improved from +/-7 LSBs to +/-4LSBs across the full operating temperature range in 12 bit mode when offset error calibration is employed.

    Yes, you are correct. These specs are included in the datasheet spns242a, Table 7-7 MibADC Operating Characteristics Over Full Ranges of Recommended Operating Conditions

    Jeffrey Cranmer said:

    (6) Once you have computed the midpoint value, D(cal), as shown in figure 16-12 of the TMS570LS0232 technical reference manual, how are you supposed to use that number?  Is it indicative of a linearity error term (i.e. curved instead of straight) or a slope error term (i,e, error will be twice as far from ideal at maximum input voltage).

    The differential midpoint calculation can be used as another sanity check or as another calibration point to indirectly determine that the range on ADREFLO and HI are within expected values. i.e., if you see a shift in the midpoint beyond an acceptable level, you can take action. Otherwise, it is simply another reference point.

    Jeffrey Cranmer said:

    (7) If the offset error is negative, do you need to calibrate only using reference values > 0.  In other words, don't use VRefLo on its own (Bridge_en=1, HILO=0) if it is connected to Vss, since the actual offset could be as low as -4.  This will return an ADC result of 0 resulting in an erroneous offset calculation?

    No. It is possible for the resulting offset to be negative in the case that the error offset is negative which would result in a negative ADC reading.

  • Thanks Chuck, though I think you may have misunderstood my first question.

    I understand the theory of 2's complement numbering. I was trying to understand the methodology of calibration as described in section 16.7.1.2 of the reference manual.

    Table 16-2 lists four different calibration switch modes (i.e. with CAL_EN = 1). The first two of those, with BRIDGE_EN=0, provide a reference voltage input which is based upon a potential divider formed by R1 and R2 internal resistors. The second pair, with BRIDGE_EN = 1, simply apply ADRefLo and ADRefHi.

    In section 16.7.1.2, the procedure suggests that you capture some, possibly all of these voltages, then use the resulting values to extrapolate a calibration offset error correction value which is then loaded into ADCALCR. It's this formula that I'm trying to get to.

    Is the intent that only those two values with BRIDGE_EN = 1 be used for offset calibration, and the two values with BRIDGE_EN = 0 are used to compute the offset voltage? If this is true, do you use both numbers to determine an offset voltage, or do you ignore the value that returns either the maximum or the minimum convertible number and use the other value to compute the offset calibration?

    Looking deeper into this, it appears that the ADCALR register is 11 bits plus a sign. This implies that the calibration function works only on an 11 bit ADC conversion accuracy. Is this understanding correct?
    Please can you advise whether the example below correctly shows the calibration procedure?

    e.g. Assume that the actual hardware offset voltage at the ADC is -4 (12 bits). In this example, an input voltage of 5LSBs would return a raw, uncompensated conversion value of 1. You would need to apply a positive offset adjustment of 4 x 12 bit LSBs to compensate for this offset.
    Setting BRIDGE_EN = 0 and HILO = 0 (ADREFLO applied), the value returned in the ADCALR register would need to be -2 (11 bits + sign). The ADC is not capable of converting a voltage that is lower than ADREFLO, so the actual returned result will be 0.
    Setting BRIDGE_EN = 0 and HILO = 1 (ADREFHI applied), the value returned by the ADCALR register will be 2045 (11 bits + sign). We can use this result to calculate that the actual 11 bit offset is 2045- 2047 = -2. We will then have to multiply this number by -2 to get the correct 12 bit offset value (+4) to write to the ADCALR register and use in further calculations.

    Finally, since the ADC measurements (returned in the 12 EV_DR bits of the FIFO) are bounded by the limits 0 and 4095, the implication is that any applied ADC offset compensation will reduce the available ADC range by the magnitude of the compensation variable. i.e., for the example given above,
    (1) any input voltage less than 4LSBs above ADREFLO would return a value of 4 after offset compensation is applied, and
    (2) any input voltage that would raw convert to a value of 4091 or more (i.e. an input voltage at ADREFHI or above) would return a value of 4095 after compensation.

    Is this understanding correct?

    Jeff
  • Chuck - please can you respond to my May 16th questions?

    Thanks

  • Hello Jeff,

    My apologies for the delay in my reply. I was pulled away from my activities for a few days to handle another urgent request.

    Jeffrey Cranmer said:

    I understand the theory of 2's complement numbering. I was trying to understand the methodology of calibration as described in section 16.7.1.2 of the reference manual.

    So the theory here is that you perform the conversions through different combinations of R1 and R2 to give you results equidistant from the midpoint ([ADREFHI-ADREFLO]/2). Once you have have all the test results, you can then take the average to determine the actual midpoint knowing that the relationships between R1 and R2 will be a consistent ratio allowing to eliminate the error due to the semiconductor process that results in variation of the actual R1 and R2 resistances. Ocnce the true midpoint is known, you simply calculate the difference between the theoretical midpoint (0xFFF/2 = 0x7FF) and the actual midpoint to get the offset to write to the ADCALR register. Once written to the ADCALR register, this offset is applied (added to each subsequent conversion).

    Examination of the adcCalibration function generated by Halcogen may help demonstrate the process a bit more concisely.

        for(loop_index=0U;loop_index<4U;loop_index++)
        {
            /* Disable Self Test and Calibration mode */
            adc->CALCR=0x0U;
    
            switch(loop_index)
            {
                case 0U :   /* Test 1 : Bride En = 0 , HiLo =0 */
                            adc->CALCR=0x0U;
                            break;
    
                case 1U :   /* Test 1 : Bride En = 0 , HiLo =1 */
                            adc->CALCR=0x0100U;
                            break;
    
                case 2U :   /* Test 1 : Bride En = 1 , HiLo =0 */
                            adc->CALCR=0x0200U;
                            break;
    
                case 3U :   /* Test 1 : Bride En = 1 , HiLo =1 */
                            adc->CALCR=0x0300U;
                            break;
                default :
                            break;
            }
    
            /* Enable Calibration mode */
            adc->CALCR|=0x1U;
    
            /* Start calibration conversion */
            adc->CALCR|=0x00010000U;
    
            /* Wait for calibration conversion to complete */
            /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Hardware status bit read check" */
            while((adc->CALCR & 0x00010000U)==0x00010000U)
            {
            } /* Wait */
    
            /* Read converted value */
            conv_val[loop_index]= adc->CALR;
        }
    
        /* Disable Self Test and Calibration mode */
        adc->CALCR=0x0U;
    
        /* Compute the Offset error correction value */
        conv_val[4U]=conv_val[0U]+ conv_val[1U] + conv_val[2U] + conv_val[3U];
    
        conv_val[4U]=(conv_val[4U]/4U);
    
        offset_error=conv_val[4U]-0x7FFU;
    
        /*Write the offset error to the Calibration register */
        /* Load 2;s complement of the computed value to ADCALR register */
        offset_error=~offset_error;
        offset_error=offset_error & 0xFFFU;
        offset_error=offset_error+1U;
    
        adc->CALR = offset_error;

    Jeffrey Cranmer said:
    Is the intent that only those two values with BRIDGE_EN = 1 be used for offset calibration, and the two values with BRIDGE_EN = 0 are used to compute the offset voltage? If this is true, do you use both numbers to determine an offset voltage, or do you ignore the value that returns either the maximum or the minimum convertible number and use the other value to compute the offset calibration?

    Generally, as the driver code shows, all 4 modes can be used. However, given the two modes that result in ADREFHI and ADRELO, these will definitely aid in determining the slope of the ADC results given there are now 4 datapoints for the midpoint calculation. If you consider the impact of the ADREFLO and ADREFHI to be incorporating the error at the tail ends of the ADC range, then the offset will be the average offset over the full range. If the bulk of the conversions are to be in the mid range, then it might be prudent to only include the D(CAL1) and D(CAL2) values to determine the offset and provide a sweet spot of operation.

    Jeffrey Cranmer said:
    Looking deeper into this, it appears that the ADCALR register is 11 bits plus a sign. This implies that the calibration function works only on an 11 bit ADC conversion accuracy. Is this understanding correct?

    Since the calibration is always relative to the midpoint, the offset can never be more than 0x7FF or half the full range of the ADC (ie, dependent on the mode of operation as 12bit or 10bit resolution). This means 11-bits + the sign bit are sufficient.

    Jeffrey Cranmer said:
    Setting BRIDGE_EN = 0 and HILO = 0 (ADREFLO applied), the value returned in the ADCALR register would need to be -2 (11 bits + sign). The ADC is not capable of converting a voltage that is lower than ADREFLO, so the actual returned result will be 0.

    With BRIDGE_EN = 0 and HILO = 0, the Vcal1 adc voltage will be (ADREFHI × R1 + ADREFLO × R2) / (R1 + R2). How is this going to return a value of -2? Remember that during calibration enabled, ADCALR register is used to store the ADC convertion result for the calibration converstion. i.e., you would run with this step and retrieve the counts from the ADCALR register moving it to a intermediate storage location in RAM (D(cal1). Next run with BRIDGE_EN=0 and HILO = 1, read the results from ADCALR and store (D(cal2). Use the formula (D(cal1)+D(cal2))/2 to calculate the actual midpoint then calculate the offset by taking the D(avg) - 0x7FF = OFFSET to be written into ADCALR after exiting calibration mode.

    Jeffrey Cranmer said:
    Finally, since the ADC measurements (returned in the 12 EV_DR bits of the FIFO) are bounded by the limits 0 and 4095, the implication is that any applied ADC offset compensation will reduce the available ADC range by the magnitude of the compensation variable. i.e., for the example given above,
    (1) any input voltage less than 4LSBs above ADREFLO would return a value of 4 after offset compensation is applied, and
    (2) any input voltage that would raw convert to a value of 4091 or more (i.e. an input voltage at ADREFHI or above) would return a value of 4095 after compensation.

    It is correct that the offset can cause the result to saturate to 0x000 or to 0xFFF. Given the nature of the ADC and the purpose of the offset, this would then be an accurate representation with respect to the voltage applied. It would also be expected for the application/system design  to note this as a questionable result since a saturated result is a questionable result given you cannot determine to what degree the result is saturated. i.e., if ADREFHI = 5V a conversion on 5.1V will saturate as will a conversion on 10V but the latter could permanently damage the device.

  • Apologies for the font issue. I was unable to correct it after pasting the formula from another document. If there is any difficulty reading let me know and I will repost.
  • Thanks Chuck,

    This was very helpful.  One follow-up question.  I made an error in my penultimate question.  It should have read BRIDGE_EN =1, not BRIDGE_EN=0

    "Setting BRIDGE_EN = 1 and HILO = 0 (ADREFLO applied), the value returned in the ADCALR register would need to be -2 (11 bits + sign). The ADC is not capable of converting a voltage that is lower than ADREFLO, so the actual returned result will be 0."

    Is this understanding correct? If so, it seems that this result would inject a saturated measurement error into the 4 value calculation given in the code example.  

    My guess is that, since that error is at-most 4LSBs, the averaged impact of the error across 4 different measurements is small enough that it would contribute typically  just 1LSB of error into the calibration calculation, so its effect is being discounted?

    e.g. original offset = 4.

    Saturated calculation, assuming R1 and R2 are perfectly trimmed:

    Offset = AVG (-2047, 2044, -48, 40) = -2.75, Approx. 3

    Unsaturated calculation:

    Offset = AVG (-2051, 2044, -48, 40) = -3.75, Approx. 4

  • Hi Jeff,

    So in your example, the reference voltage will be ADREFLO as noted in the TRM. If the ADREFLO is negative, this will result in a voltage outside the specified limitation of the ADC and it will return a saturated result of 0x000 on the low end. i.e., yes, you are correct in that the lower limit of the ADC count is 0x000.

    Also, note in your example calculations you are assuming offsets and taking the average of the offsets. In some way, I would think this might work but it is important to understand that the value stored in the ADCALR field when calibration is enabled, is not an offset. The value stored will be the raw ADC counts of the voltage across the resistor network.
  • OK, I see where I made a little change.

    The example code that you provided takes four measurements with ADCALR=0 applied to those values (effectively taking raw, uncompensated measurements).

    Those measurements are then added up and divided by 4 to obtain a number that, if

    1. the actual ADC offset you need to compensate was 0, and
    2. the linearity of the A/D conversion was perfect,

    would result in Avg (0, 4095, 2047, 2047) as the final result.  Subract 2047 from this number and round off to get a final offset of 0

    My example provided a case where the offset before compensation  was 4, but I compensated each individual value before averaging, rather than subtracting the compensation term from the answer,

    I don't think that modifying that, however, changes the answer:

    With saturation: Offset = AVG (0, 4091, 1999, 2087) - 2047 = -2.75, Approx. 3

    Compensating for ADC saturation: Offset = AVG (-4, 4091, 1999, 2087) - 2047 = -3.75, Approx 4

    I think I understand this scheme now.  Please can you confirm whether this understanding is correct?

    Thanks for the assistance.

  • Hi Jeff,

    Yes, this explanation is correct.