Hello Support,
According to spnu563.pdf, Section 3.3.2 and Section 4.3.4, at the end of Interconnect Self Test, there will be CPU Reset as well as SDC_STATUS Register update.
Unfortunately CPU reset does occur but after the reset I am seeing the SDC_STATUS register contents as zero.
Does CPU Reset also clears the SDC_STATUS Register?
This is my incorrect assumption I suppose as there should be a flag within the device to test for Interconnect Self Test status completion.
Please provide me some clue about which register to read and obtain the status of Interconnect SelfTest.
Thank you.
Regards
Pashan
