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TMS570LS3137: why is the Rx interrupt not cleared?

Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

Hi,

I created a project to exercise SCI2/LIN driver as described in this video. : https://www.youtube.com/watch?v=PpalANwuzIo

The project works as claimed, fine.

However I am confused about HalCogen generated ISR "linHighLevelInterrupt()". In this ISR, Rx interrupt is not cleared.

Aren't we supposed to clear pending interrupts as the first thing in an ISR? 

could you please explain why Rx interrupt is not cleared in this ISR? below is HalcoGen generated ISR.

thanks in advance,

========================================

void linHighLevelInterrupt(void)
{
uint32 vec = scilinREG->INTVECT0;
uint8 byte;
/* USER CODE BEGIN (35) */
/* USER CODE END */

switch (vec)
{
case 1U:
sciNotification(scilinREG, (uint32)SCI_WAKE_INT);
break;
case 3U:
sciNotification(scilinREG, (uint32)SCI_PE_INT);
break;
case 6U:
sciNotification(scilinREG, (uint32)SCI_FE_INT);
break;
case 7U:
sciNotification(scilinREG, (uint32)SCI_BREAK_INT);
break;
case 9U:
sciNotification(scilinREG, (uint32)SCI_OE_INT);
break;

case 11U:
/* receive */
byte = (uint8)(scilinREG->RD & 0x000000FFU);

if (g_sciTransfer_t[1U].rx_length > 0U)
{
*g_sciTransfer_t[1U].rx_data = byte;
/*SAFETYMCUSW 567 S MR:17.1,17.4 <APPROVED> "Pointer increment needed" */
g_sciTransfer_t[1U].rx_data++;
g_sciTransfer_t[1U].rx_length--;
if (g_sciTransfer_t[1U].rx_length == 0U)
{
sciNotification(scilinREG, (uint32)SCI_RX_INT);
}
}
break;

case 12U:
/* transmit */
/*SAFETYMCUSW 30 S MR:12.2,12.3 <APPROVED> "Used for data count in Transmit/Receive polling and Interrupt mode" */
--g_sciTransfer_t[1U].tx_length;
if (g_sciTransfer_t[1U].tx_length > 0U)
{
uint8 txdata = *g_sciTransfer_t[1U].tx_data;
scilinREG->TD = (uint32)(txdata);
/*SAFETYMCUSW 567 S MR:17.1,17.4 <APPROVED> "Pointer increment needed" */
g_sciTransfer_t[1U].tx_data++;
}
else
{
scilinREG->CLEARINT = (uint32)SCI_TX_INT;
sciNotification(scilinREG, (uint32)SCI_TX_INT);
}
break;

default:
/* phantom interrupt, clear flags and return */
scilinREG->FLR = ~scilinREG->SETINTLVL & 0x07000303U;
break;
}