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  • TI Thinks Resolved

RM48L940: ESMSR3 Register Read

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Replies: 6

Views: 175

Part Number: RM48L940

When I attempt to read ESM Grp 3 status register (address 0xFFFFF520) I get garbage content from RAM (stack location). I'm able to read Grp 1 and Grp 2 status registers as well as other registers from the ESM module without a problem. Is there anything special I need to do before I can read Grp 3 register?

  • Hello,

    There should be no problem when reading ESM Status register 3 (esmREG->SR1[2]).

    Best regards,
    Miro

    Best regards,
    Miro

  • In reply to Miro:

    That's what I thought and hence my question.

    When I read esmREG->SR1[2] I get content of RAM from my stack. It doesn't matter if I use the esmREG struct or hard coded address 0xFFFFF520.

    I can read esmREG->SR1[0] and esmREG->SR1[1] and other ESM modules registers without a problem. Any suggestions about what to check?

  • In reply to Guy Tadi:

    OK. I narrowed this down some more. When I call SL_SelfTest_Flash() then in sl_selftest.c, after the line

    flashread = *(volatile uint32 *)flashBadECC1;

    I'm not able to read sl_esmREG->SR1[2]

    Before that reading SR1[2] is OK, but the test requires reading esmREG->SR1[2] after flashread to determine PASS/FAIL condition. What could be going on?

  • In reply to Guy Tadi:

    Hello,

    Unfortunately I don't have the same MCU and I made tests with 2 other MCUs that I have at my place but I am not able to replicate this issue.

    Do you have some progress with this issue?

    Best regards,
    Miro

    Best regards,
    Miro

  • In reply to Miro:

    Hello,

    Did you solve this issue?

    Best regards,
    Miro

  • In reply to Miro:

    Hello,

    I assume you have solved this issue and I'll close this thread for now. You can always reopen it with writing at the end or you can open new thread.

    Best regards,
    Miro

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