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TMS570LC4357: Code getting stuck in infinite loop of "dataEntry" interrupt vector while initialising message box for CAN controller

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

Hi,

I have written a piece of code for configuring the message boxes for CAN controller-

In below code msgBoxList is array of structure initialised in another C file and used in this file using extern declaration as shown below-

extern msgBoxType msgBoxList[MSGBOX_MAXSIZE];

void arinc825Configuration()

{

uint32 i;

msgBoxType *msgBox;

for(i=0;i<MSGBOX_MAXSIZE;i++)

{

*msgBox = msgBoxList[i];   //from this code line control goes to dataEntry

can you please tell me what is the reason behind it and how should I fix it?

Thanks

Archana

  • Hello,

    Please take a look at this threads:

    e2e.ti.com/.../225930

    e2e.ti.com/.../522075

    Best regards,
    Miro

  • Hi Miro,

    Thanks for your reply.

    while debugging I found below code in HL_sys_core.asm generated by Halcogen:

    ;-------------------------------------------------------------------------------

    ;Initialize RAM memory

    .def _memInit_

    .asmfunc

    _memInit_

    ldr r12, MINITGCR ;Load MINITGCR register address

    mov r4, #0xA

    str r4, [r12] ;Enable global memory hardware initialization

    ldr r11, MSIENA ;Load MSIENA register address

    mov r4, #0x1 ;Bit position 0 of MSIENA corresponds to SRAM

    str r4, [r11] ;Enable auto hardware initalisation for SRAM

    mloop ;Loop till memory hardware initialization comletes

    ldr r5, MSTCGSTAT

    ldr r4, [r5]

    tst r4, #0x100

    beq mloop

    mov r4, #5

    str r4, [r12] ;Disable global memory hardware initialization

    bx lr

    .endasmfunc

    ;-------------------------------------------------------------------------------

    From this I am interpreting that only SRAM is being initialized. I read in the data sheet that we need to initialize DCAN RAM before using it and it corresponds to 5th bit in the MSIENA register. So I tried below alteration to mem init function-

    ldr r11, MSIENA ;Load MSIENA register address

    mov r4, #0x21 ;Bit position 0 of MSIENA corresponds to SRAM,5th bot to enable DCAN1 RAM

    but with this change I am not able to load the code on MCU, while flashing the code it is getting stuck and showing that CPU reset is happening.

    Can you please tell what is going on?

    Thanks

    Archana

  • Hello,

    Do you have progress on this?

    Best regards,
    Miro

  • HI Miro,

    Yes, The issue got resolved.

    Thanks for the help.

    Regards

    Archana