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TMS570LC4357: Data abort exception after software reset

Part Number: TMS570LC4357
Other Parts Discussed in Thread: TMDS570LS31HDK, TMDX570LC43HDK, HALCOGEN, UNIFLASH

Hello,
I've implemented a CAN bus bootloader according to SPNA241 on TMDS570LS31HDK and TMDX570LC43HDK. Example have been fully realized just on TMDS570LS31HDK. But on TMDX570LC43HDK I've got an issue with software reset after loading application into the flash. It looks like CPU hanging after the software reset.

To explore the issue a simple test was created. Led blinks three times before software reset.

int main(void)
{
/* USER CODE BEGIN (3) */
    int i, j;

    //Configure as output
    hetREG1->DIR = (1 << 5);

    while(1)
    {
        //three blinks before reset
        for(j = 0; j < 6; j++)
        {
            gioToggleBit(hetPORT1, 5);
            for(i = 0; i<5000000; i++);
        }
        //software reset
        systemREG1->SYSECR = (0x10) << 14;
    };
/* USER CODE END */

    return 0;
}

On TMDS570LS31HDK the led blinks continuously, but on TMDX570LC43HDK just three times. New cycle of three-times blinking on TMDX570LC43HDK can be initialized just by POWERON_RESET.
First running of gioToggleBit() function after SW reset gives data abort exception. In particular, the last instruction in following code.

gioToggleBit():
00002c40:   E24DD008            sub        r13, r13, #8
00002c44:   E58D1004            str        r1, [r13, #4]
00002c48:   E58D0000            str        r0, [r13]
381           if ((port->DIN & (uint32)((uint32)1U << bit)) != 0U)
00002c4c:   E59D0000            ldr        r0, [r13]
00002c50:   E59DC004            ldr        r12, [r13, #4]
00002c54:   E3A01001            mov        r1, #1
00002c58:   E5900004            ldr        r0, [r0, #4]

I used CCS Version: 10.0.0.00010, HALCoGen 04.07.01

Can you help to solve the issue with TMDX570LC43HDK?

Regards,
Sergey

  • Hello,

    Please download the CAN bootloader for LC43x from this link:

    https://git.ti.com/hercules_examples.

  • Hello, Wang!

    Thank you for quick reply!
    As I implemented a bootloader according to the SPNA241 I've used link to examples from the document:
    URL: git.ti.com/.../Bootloaders.
    So I have an issue with TMDX570LC43HDK implementing code from the link.

    Regards,
    Sergey

  • Hi Sergey,

    I didn't see this kind of issue when I tested the bootload on HDK before. I will do a test on LC43HDK. 

  • Hi Wang,

    I would really appreciate you!

    Regards, Sergey

  • Hi, I have a very similar problem.

    After software reset, a read of SCI register (GCR1 of SCI1) causes Data Abort exception.

    Please help, this is blocking for me.

    Regards.

  • Hello,

    The processor takes the data abort if data should be read from or written to a protected or faulty memory location. This could be because of:

    1. The memory location is not implemented
    2. The memory location is read or write only in privileged mode (when processor is in User mode)
    3. The memory location is read or write protected by the MPU
    4. If an error is detected in the data by the ECC checking logic

    Can you please check the data fault status (DFSR) register and address register in CP15 registers?

  • Hi,

    I will provide those, but please let me know which of the CP15 registers should I look at?

    Thanks,

  • Hello,

    CCS has the capability to read/write those CP15 register.

    CCS->View-->Registers:

  • Hi Wang,

    I’ve checked registers for the test code written in my first post. So following instruction gives an exception

    00002c58:   E5900004            ldr        r0, [r0, #4]

     

    Here is DFSR register:

    CP15_DATA_FAULT_STATUS     0x00001008        DFSR [Core]      

    Rsv1      0000000000000000000    Reserved SBZ

    SD         1                                 External Abort Only: AXI Decode(0) or AXI Slave (1)        

    RW         0                               Read(0) or Write(1) Caused Abort          

    S             0                               Status[4]            

    Rsv2      00                              Reserved SBZ   

    DOMAIN             0000             Domain SBZ      

    STATUS             1000              Status[3:0] - 0x01=Algn, 0x00=BG, 0x0D=Perm, 0x08=SExt, 0x16=ASExt, 0x19=SECC, 0x18=ASECC, 0x02=DBG         

     

    Fault data register:

    CP15_DATA_FAULT_ADDRESS   0xFFF7B850        DFAR [Core]

     

    According to Cortex-R5 Technical Reference Manual DFSR register determines synchronous external abort:

    0xFFF7B850 is address of HETDIN register

     

    When I run the code on  TMDS570LS31HDK ldr instruction uses the same address 0xFFF7B850 but exception doesn’t occur.

    Regards,
    Sergey

  • Hi Wang and Sergey,

    Sorry for the late response,

    this is my case:

    The fault address corresponds to GCR1 of SCI1.

    Regards.

  • Hello Sergey,

    Has the data abort issue been solved? What changes did you make to the original example code? I did another try on my bench, and it works without any issue.

  • Hello, Wang!

    Thank you for your another trying on the bench.

    I didn’t make any changes to the original bootloader example code for both  TMDS570LS31HDK and TMDX570LC43HDK. I’ve got success for TMDS570LS31HDK and mentioned issue for TMDX570LC43HDK. I tried on two items of TMDX570LC43HDK.

    So the same example code works on your bench successfully and has an issue on the purchased TMDX570LC43HDK.   It allows to suppose some difference either in tested controllers or in IDE. I’ve used CCS Version: 10.0.0.00010, HALCoGen 04.07.01.

    Did you use the same?

     Just now I have no any idea how to solve the issue for TMDX570LC43HDK. I am testing the controllers to verify whether they can be used in projects of our company. The fact that required functions work on some bench will not be impressive evidence for our company management. I have to demonstrate key features for our projects on purchased development kits.

    So if you know some idea how to solve the issue exactly for TMDX570LC43HDK let me know.

    Regards, Sergey

  • Hello Sergey,

    In your test, the application image has been uploaded and programmed to flash through the CAN bootloader. After the bootloader issues a SW reset, when the code jumps to the application? 

    In the bootloader example, the bootloader code checks if the GIOA[7] is pulled low, and if the application has been programmed successfully. If GIOA[7] is LOW or application has been programmed, the code will jump to application. Otherwise, it will call the update function for uploading data.

     

  • Hello, Wang!

    In my case after SW reset the code really jumps to the application. And data abort exception occurs exactly in the application. So it’s possible to separate the data abort exception issue from the bootloader and consider sequence: SW reset - application.

    Such example and explanation of it behavior I submitted in my first post dated Jun 19, 2020. On your request on DFSR register me and Lukasz Matecki answered in posts dated Jul 2, 2020 and Jul 7 2020. Registers analysis showed that after SW reset at least several memory areas of TMDX570LC4357 become protected. But on TMDS570LS31HDK the issue does not occur.

    If you please, explain why does so simple test code work on TMDS570LS31HDK and does not work on TMDX570LC4357? Is it possible to solve the issue for TMDX570LC4357?

    Regards, Sergey

  • Hello Sergey,

    The bootloader works ok: download the image from PC, then program it to flash. The data abort may be caused by your application.

    Did you test you code? The VECTORS in linker cmd file of the application should not be at 0x00000000. It should at the start address of your application.

        VECTORS (X)  : origin=0x00000000 length=0x00000020

    Otherwise, it won't work.

    In bootloader side, the interrupt should be disabled before calling the jumping instruction.

    Another thing, is the ECC of application programmed? The Fapi_AutoEccGneration should be used when programming the application with the flash API. This flash API is called in Fapi_BlockProgram(0 function in bl_flash.c:

    Fapi_issueProgrammingCommand((uint32_t *)dst,
    (uint8_t *)src,
    (uint32_t) bytes,
    0,
    0,
    Fapi_AutoEccGeneration);

  • Hi Wang,

    In my case, there is no flashing (I'm not using bootloader) but still I'm having a very similar problem.

    Can this have something to do with ECC calculated by CCS / Uniflash?

  • Hi Lukasz,

    Can you please open a new thread? Thanks

  • Hello, Wang!

    Here is code from my first post:

    int main(void)
    {
    /* USER CODE BEGIN (3) */
        int i, j;
    
        //Configure as output
        hetREG1->DIR = (1 << 5);
    
        while(1)
        {
            //three blinks before reset
            for(j = 0; j < 6; j++)
            {
                gioToggleBit(hetPORT1, 5);
                for(i = 0; i<5000000; i++);
            }
            //software reset
            systemREG1->SYSECR = (0x10) << 14;
        };
    /* USER CODE END */
    
        return 0;
    }
    

    It works on TMDS570LS31HDK and does not work on  TMDX570LC43HDK.

    Can you check the code on your TMDX570LC43HDK , if you please? And if it will work, send the project for trying on my TMDX570LC43HDK.

    Thank you in advance.

    Regards,
    Sergey

  • Hello Sergey,

    I found the root cause. Actually it was caused by the code generated through HALCoGen. The SW Reset is not handled correctly in getResetSource(void)  function and in sys_startup.c

    1. Add SW Reset to getResetSource(void) :

    else if ((SYS_EXCEPTION & (uint32)SW_RESET) !=0U)
    {
           rst_source = SW_RESET;

           SYS_EXCEPTION = (uint32)SW_RESET;
    }

    2. Move SW_RESET to line 132

    /*SAFETYMCUSW 62 S MR:15.2, 15.5 <APPROVED> "Need to continue to handle POWERON Reset" */
    case DEBUG_RESET:
    case EXT_RESET:

    /* USER CODE BEGIN (6) */
    case SW_RESET:

    Attached is my CCS project:

    2664.TMS570LC4357_Sergey.zip

  • Hello, Wang!

    This resolved the issue.

    It was important thing for our projects. I am very grateful and I want to thank you!

    Regards, Sergey

  • Hi Wang.

    This patch resolves my issue as well.

    Please make sure the HalcoGen team is aware of this problem.

    Many thanks,

    Regards

    Łukasz

  • Hi Łukasz,

    I will submit a ticket for this issue. Thanks