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TMS570LC4357: Relationship of ESM errors 2.3, 2.19, 2.21 and 1.4, 1.6

Part Number: TMS570LC4357

Dear team of the Hercules Support,

Would you please explain how are the uncorrectable ESM Errors 2.3, 2.19 and 2.21 related to each other?
And the correctable errors 1.4 and 1.6 respectively?

It still isn't plain to me who is issueing each of these errors and in which cases one of these errors is issued.

(Q1) For example, is the 2.19 issued only on implicit OTP reads and not on CPU reads/instructon fetches on the flash?

(Q2) What's the difference between the errors 2.3 and 2.21 in terms of issuer and conditions?

(Q3) Are both errors 2.3 and 2.21 results of a bus event 0x71 with EVNTBUSm bit 48 set?

(Q4) Which of these errors will occur during the test FLA11 using DIAGMODE 7?

Thank you in advance for your support - enjoy the weekend!

Stephan

  • Hello Stephan,

    1. ESM 1.6 and ESM 2.19 are related to the implicit read from the flash bank by the wrapper before the CPU is even released from reset. After system reset, the wrapper will do some reads from the flash bank's OTP sector. The reads include reading the AJSM password and the device configuration. These reads are NOT CPU reads. The CPU is still held in reset. Inside the flash wrapper there is ECC logic that will detect ECC faults for these implicit reads. After these two reads are done then the CPU is released from reset.

    2. When an uncorrectable ECC error is detected on the CPU's AXI-M bus, the CPU signals this error event via its event bus interface. The EVENTBUS(48) is then directly connected to the ESM 2.3. There is no flags captured in either L2RAMW or L2FMC. It does not output the associated error address.

    3.   ESM 1.4 and ESM 2.21 are EPC correctable and uncorrectable errors.

    4.  Should be ESM 1.4 (1-bit ECC error) or ESM 2.3 (2-bit ECC error)

  • Hi, QJ,

    (Q5) OK, EVNTBUSm.48 leads to an ESM Group 2 Error Channel 3 (2.3).
    But how about an EVNTBUSm.47 "All correctable bus faults" event? Is such an event signalised by an ESM Error too?
    Or has such an event to be exported to EPC to get an error at all, particularly to get an ESM 1.4 Error?

    (Q6) If events on the event bus are exported to the EPC and the CPU detects an uncorrectable ECC error on the AXI-M bus, does that mean
    that both an ESM 2.3 and an ESM 2.21 error rise up?

    Thank you again

    Stephan

  • Hello Stephan,

    My understanding is yes, the EVENTBUS47 is routed to ESM1.4. I will check with our design team.