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CCS/TMS570LS0232: TMS570LS0232 CCS compilation problem

Charles.huang
Intellectual 260 points
Part Number: TMS570LS0232

Tool/software: Code Composer Studio

Hi 

I have some questions to ask about using TMS570LS0232  

1.on the Flash question, whether you can provide Flash drivers, and the location of Flash is locked, the customer asked whether you can customize the location, specify the location of writing bootload, to avoid each upgrade position changes.

2. I want to save space, does not compile the sys_pcc.c and sys_selfttest.c files, I want to separate configuration involves functional safety inspection, it can optimize a lot of space, you can through the self configuration of functional safety certification.

3. About the configuration of RTI, I would like to use Compare to do some timing work without interrupting

4.On the ESM configuration, whether you can configure Group2 and 3 configuration, as well as Group1 can also output nError signal, ESM interrupt is every regular inspection or running test procedures to run

5.About the configuration of CRC, whether it can not be enabled?

6.Now the generated hex file size does not exceed the size of flash, but the display in the map file size is beyond the size of Flash, if you use other compiler if you get a different size, which is good

7.I want to optimize the program flash space, and what's the best possible space solution in CCS, thank you

  • 0
    TI__Guru**** 186196 points
    hello Charles,

    1. The bootloader can program the application code to any locations, but the bootloader has to be located at 0x00.
    2. don't understand your #2 question
    3. OK, you don't have to use or enable the RTI interrupt. Are you going to read the free running register to compare it with the compare value manually? Or you just use RTI as a timer?
    4. For ESM, Group1 has a configurable interrupt response and configurable ERROR pin behavior. Group2 errors always generate a high priority interrupt and an output on the ERROR pin, and Group3 errors always generate an ERROR pin output. Group2 and Group3 are not configurable.
    5. No, the CRC itself is enabled and cannot be disabled. but you can put it into power down mode.
    6. The size of the hex file is not same as the size required for flash. For example, the flash size is 0x1000, and your hex file size is 0x100, but location of your hex code is at 0x950 (0x950~0x1050) which is beyond the flash valid range,
    7. You can try different optimization level in CCS:

    • --opt_for_speed=0: Enables optimizations geared towards improving the code size with a high risk of worsening or impacting performance.
    • --opt_for_speed=1: Enables optimizations geared towards improving the code size with a medium risk of worsening or impacting performance.
    • --opt_for_speed=2: Enables optimizations geared towards improving the code size with a low risk of worsening or impacting performance.
    • --opt_for_speed=3: Enables optimizations geared towards improving the code performance/speed with a low risk of worsening or impacting code size.
    • --opt_for_speed=4: Enables optimizations geared towards improving the code performance/speed with a medium risk of worsening or impacting code size.
    • --opt_for_speed=5: Enables optimizations geared towards improving the code performance/speed with a high risk of worsening or impacting code size.